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[AMDGPU] Fix predicates on FLAT scratch ST/SVS mode Pseudos (#85442)
Definitions like this did not work as intended: let is_flat_scratch = 1 in { let SubtargetPredicate = HasFlatScratchSVSMode in def _SVS : FLAT_Scratch_Load_Pseudo<opName, regClass, HasTiedOutput, 1, 1>, FlatScratchInst<opName, "SVS">; let SubtargetPredicate = HasFlatScratchSTMode in def _ST : FLAT_Scratch_Load_Pseudo<opName, regClass, HasTiedOutput, 0, 0, 0>, FlatScratchInst<opName, "ST">; } They tried to override SubtargetPredicate, but then it was overridden again (back to its default value) by setting is_flat_scratch, which caused SubtargetPredicate to be recalculated in the base class. (This patch also removes some overrides of SubtargetPredicate that are redundant due to being recalculated in the base class.) Fix this by pushing overrides of is_flat_scratch and is_flat_global "in" as far as possible. This has the added benefit that there is no need to override them around groups of Pseudo definitions like this: let is_flat_global = 1 in { defm GLOBAL_ATOMIC_CMPSWAP : FLAT_Global_Atomic_Pseudo <"global_atomic_cmpswap", VGPR_32, i32, v2i32, VReg_64>; ... } which are plainly Global instructions anyway. Verified by inspecting the output of TableGen. It seems to be NFC in practice.
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‎llvm/lib/Target/AMDGPU/FLATInstructions.td‎

Lines changed: 69 additions & 77 deletions
Original file line numberDiff line numberDiff line change
@@ -239,7 +239,7 @@ class FLAT_Store_Pseudo <string opName, RegisterClass vdataClass,
239239
}
240240

241241
multiclass FLAT_Global_Load_Pseudo<string opName, RegisterClass regClass, bit HasTiedInput = 0> {
242-
let is_flat_global = 1, SubtargetPredicate = HasFlatGlobalInsts in {
242+
let is_flat_global = 1 in {
243243
def "" : FLAT_Load_Pseudo<opName, regClass, HasTiedInput, 1>,
244244
GlobalSaddrTable<0, opName>;
245245
def _SADDR : FLAT_Load_Pseudo<opName, regClass, HasTiedInput, 1, 1>,
@@ -276,7 +276,7 @@ multiclass FLAT_Global_Load_AddTid_Pseudo<string opName, RegisterClass regClass,
276276
}
277277

278278
multiclass FLAT_Global_Store_Pseudo<string opName, RegisterClass regClass> {
279-
let is_flat_global = 1, SubtargetPredicate = HasFlatGlobalInsts in {
279+
let is_flat_global = 1 in {
280280
def "" : FLAT_Store_Pseudo<opName, regClass, 1>,
281281
GlobalSaddrTable<0, opName>;
282282
def _SADDR : FLAT_Store_Pseudo<opName, regClass, 1, 1>,
@@ -389,6 +389,7 @@ class FLAT_Scratch_Load_Pseudo <string opName, RegisterClass regClass,
389389
!if(HasTiedOutput, (ins CPol:$cpol, getLdStRegisterOperand<regClass>.ret:$vdst_in),
390390
(ins CPol_0:$cpol))),
391391
" $vdst, "#!if(EnableVaddr, "$vaddr, ", "off, ")#!if(EnableSaddr, "$saddr", "off")#"$offset$cpol"> {
392+
let is_flat_scratch = 1;
392393
let has_data = 0;
393394
let mayLoad = 1;
394395
let has_saddr = 1;
@@ -416,6 +417,7 @@ class FLAT_Scratch_Store_Pseudo <string opName, RegisterClass vdataClass, bit En
416417
(ins vdata_op:$vdata, VGPR_32:$vaddr, flat_offset:$offset, CPol_0:$cpol),
417418
(ins vdata_op:$vdata, flat_offset:$offset, CPol_0:$cpol)))),
418419
" "#!if(EnableVaddr, "$vaddr", "off")#", $vdata, "#!if(EnableSaddr, "$saddr", "off")#"$offset$cpol"> {
420+
let is_flat_scratch = 1;
419421
let mayLoad = 0;
420422
let mayStore = 1;
421423
let has_vdst = 0;
@@ -428,37 +430,33 @@ class FLAT_Scratch_Store_Pseudo <string opName, RegisterClass vdataClass, bit En
428430
}
429431

430432
multiclass FLAT_Scratch_Load_Pseudo<string opName, RegisterClass regClass, bit HasTiedOutput = 0> {
431-
let is_flat_scratch = 1 in {
432-
def "" : FLAT_Scratch_Load_Pseudo<opName, regClass, HasTiedOutput>,
433-
FlatScratchInst<opName, "SV">;
434-
def _SADDR : FLAT_Scratch_Load_Pseudo<opName, regClass, HasTiedOutput, 1>,
435-
FlatScratchInst<opName, "SS">;
436-
437-
let SubtargetPredicate = HasFlatScratchSVSMode in
438-
def _SVS : FLAT_Scratch_Load_Pseudo<opName, regClass, HasTiedOutput, 1, 1>,
439-
FlatScratchInst<opName, "SVS">;
433+
def "" : FLAT_Scratch_Load_Pseudo<opName, regClass, HasTiedOutput>,
434+
FlatScratchInst<opName, "SV">;
435+
def _SADDR : FLAT_Scratch_Load_Pseudo<opName, regClass, HasTiedOutput, 1>,
436+
FlatScratchInst<opName, "SS">;
440437

441-
let SubtargetPredicate = HasFlatScratchSTMode in
442-
def _ST : FLAT_Scratch_Load_Pseudo<opName, regClass, HasTiedOutput, 0, 0, 0>,
443-
FlatScratchInst<opName, "ST">;
444-
}
438+
let SubtargetPredicate = HasFlatScratchSVSMode in
439+
def _SVS : FLAT_Scratch_Load_Pseudo<opName, regClass, HasTiedOutput, 1, 1>,
440+
FlatScratchInst<opName, "SVS">;
441+
442+
let SubtargetPredicate = HasFlatScratchSTMode in
443+
def _ST : FLAT_Scratch_Load_Pseudo<opName, regClass, HasTiedOutput, 0, 0, 0>,
444+
FlatScratchInst<opName, "ST">;
445445
}
446446

447447
multiclass FLAT_Scratch_Store_Pseudo<string opName, RegisterClass regClass> {
448-
let is_flat_scratch = 1 in {
449-
def "" : FLAT_Scratch_Store_Pseudo<opName, regClass>,
450-
FlatScratchInst<opName, "SV">;
451-
def _SADDR : FLAT_Scratch_Store_Pseudo<opName, regClass, 1>,
452-
FlatScratchInst<opName, "SS">;
453-
454-
let SubtargetPredicate = HasFlatScratchSVSMode in
455-
def _SVS : FLAT_Scratch_Store_Pseudo<opName, regClass, 1, 1>,
456-
FlatScratchInst<opName, "SVS">;
448+
def "" : FLAT_Scratch_Store_Pseudo<opName, regClass>,
449+
FlatScratchInst<opName, "SV">;
450+
def _SADDR : FLAT_Scratch_Store_Pseudo<opName, regClass, 1>,
451+
FlatScratchInst<opName, "SS">;
457452

458-
let SubtargetPredicate = HasFlatScratchSTMode in
459-
def _ST : FLAT_Scratch_Store_Pseudo<opName, regClass, 0, 0, 0>,
460-
FlatScratchInst<opName, "ST">;
461-
}
453+
let SubtargetPredicate = HasFlatScratchSVSMode in
454+
def _SVS : FLAT_Scratch_Store_Pseudo<opName, regClass, 1, 1>,
455+
FlatScratchInst<opName, "SVS">;
456+
457+
let SubtargetPredicate = HasFlatScratchSTMode in
458+
def _ST : FLAT_Scratch_Store_Pseudo<opName, regClass, 0, 0, 0>,
459+
FlatScratchInst<opName, "ST">;
462460
}
463461

464462
class FLAT_Scratch_Load_LDS_Pseudo <string opName, bit EnableSaddr = 0,
@@ -583,25 +581,27 @@ multiclass FLAT_Global_Atomic_Pseudo_NO_RTN<
583581
RegisterClass data_rc = vdst_rc,
584582
RegisterOperand data_op = getLdStRegisterOperand<data_rc>.ret> {
585583

586-
def "" : FLAT_AtomicNoRet_Pseudo <opName,
587-
(outs),
588-
(ins VReg_64:$vaddr, data_op:$vdata, flat_offset:$offset, CPol_0:$cpol),
589-
" $vaddr, $vdata, off$offset$cpol">,
590-
GlobalSaddrTable<0, opName> {
591-
let has_saddr = 1;
592-
let PseudoInstr = NAME;
593-
let FPAtomic = data_vt.isFP;
594-
}
584+
let is_flat_global = 1 in {
585+
def "" : FLAT_AtomicNoRet_Pseudo <opName,
586+
(outs),
587+
(ins VReg_64:$vaddr, data_op:$vdata, flat_offset:$offset, CPol_0:$cpol),
588+
" $vaddr, $vdata, off$offset$cpol">,
589+
GlobalSaddrTable<0, opName> {
590+
let has_saddr = 1;
591+
let PseudoInstr = NAME;
592+
let FPAtomic = data_vt.isFP;
593+
}
595594

596-
def _SADDR : FLAT_AtomicNoRet_Pseudo <opName,
597-
(outs),
598-
(ins VGPR_32:$vaddr, data_op:$vdata, SReg_64:$saddr, flat_offset:$offset, CPol_0:$cpol),
599-
" $vaddr, $vdata, $saddr$offset$cpol">,
600-
GlobalSaddrTable<1, opName> {
601-
let has_saddr = 1;
602-
let enabled_saddr = 1;
603-
let PseudoInstr = NAME#"_SADDR";
604-
let FPAtomic = data_vt.isFP;
595+
def _SADDR : FLAT_AtomicNoRet_Pseudo <opName,
596+
(outs),
597+
(ins VGPR_32:$vaddr, data_op:$vdata, SReg_64:$saddr, flat_offset:$offset, CPol_0:$cpol),
598+
" $vaddr, $vdata, $saddr$offset$cpol">,
599+
GlobalSaddrTable<1, opName> {
600+
let has_saddr = 1;
601+
let enabled_saddr = 1;
602+
let PseudoInstr = NAME#"_SADDR";
603+
let FPAtomic = data_vt.isFP;
604+
}
605605
}
606606
}
607607

@@ -614,24 +614,26 @@ multiclass FLAT_Global_Atomic_Pseudo_RTN<
614614
RegisterOperand data_op = getLdStRegisterOperand<data_rc>.ret,
615615
RegisterOperand vdst_op = getLdStRegisterOperand<vdst_rc>.ret> {
616616

617-
def _RTN : FLAT_AtomicRet_Pseudo <opName,
618-
(outs vdst_op:$vdst),
619-
(ins VReg_64:$vaddr, data_op:$vdata, flat_offset:$offset, CPol_GLC1:$cpol),
620-
" $vdst, $vaddr, $vdata, off$offset$cpol">,
621-
GlobalSaddrTable<0, opName#"_rtn"> {
622-
let has_saddr = 1;
623-
let FPAtomic = data_vt.isFP;
624-
}
617+
let is_flat_global = 1 in {
618+
def _RTN : FLAT_AtomicRet_Pseudo <opName,
619+
(outs vdst_op:$vdst),
620+
(ins VReg_64:$vaddr, data_op:$vdata, flat_offset:$offset, CPol_GLC1:$cpol),
621+
" $vdst, $vaddr, $vdata, off$offset$cpol">,
622+
GlobalSaddrTable<0, opName#"_rtn"> {
623+
let has_saddr = 1;
624+
let FPAtomic = data_vt.isFP;
625+
}
625626

626-
def _SADDR_RTN : FLAT_AtomicRet_Pseudo <opName,
627-
(outs vdst_op:$vdst),
628-
(ins VGPR_32:$vaddr, data_op:$vdata, SReg_64:$saddr, flat_offset:$offset, CPol_GLC1:$cpol),
629-
" $vdst, $vaddr, $vdata, $saddr$offset$cpol">,
630-
GlobalSaddrTable<1, opName#"_rtn"> {
631-
let has_saddr = 1;
632-
let enabled_saddr = 1;
633-
let PseudoInstr = NAME#"_SADDR_RTN";
634-
let FPAtomic = data_vt.isFP;
627+
def _SADDR_RTN : FLAT_AtomicRet_Pseudo <opName,
628+
(outs vdst_op:$vdst),
629+
(ins VGPR_32:$vaddr, data_op:$vdata, SReg_64:$saddr, flat_offset:$offset, CPol_GLC1:$cpol),
630+
" $vdst, $vaddr, $vdata, $saddr$offset$cpol">,
631+
GlobalSaddrTable<1, opName#"_rtn"> {
632+
let has_saddr = 1;
633+
let enabled_saddr = 1;
634+
let PseudoInstr = NAME#"_SADDR_RTN";
635+
let FPAtomic = data_vt.isFP;
636+
}
635637
}
636638
}
637639

@@ -641,10 +643,8 @@ multiclass FLAT_Global_Atomic_Pseudo<
641643
ValueType vt,
642644
ValueType data_vt = vt,
643645
RegisterClass data_rc = vdst_rc> {
644-
let is_flat_global = 1, SubtargetPredicate = HasFlatGlobalInsts in {
645-
defm "" : FLAT_Global_Atomic_Pseudo_NO_RTN<opName, vdst_rc, vt, data_vt, data_rc>;
646-
defm "" : FLAT_Global_Atomic_Pseudo_RTN<opName, vdst_rc, vt, data_vt, data_rc>;
647-
}
646+
defm "" : FLAT_Global_Atomic_Pseudo_NO_RTN<opName, vdst_rc, vt, data_vt, data_rc>;
647+
defm "" : FLAT_Global_Atomic_Pseudo_RTN<opName, vdst_rc, vt, data_vt, data_rc>;
648648
}
649649

650650
//===----------------------------------------------------------------------===//
@@ -848,7 +848,6 @@ defm GLOBAL_STORE_DWORD_ADDTID : FLAT_Global_Store_AddTid_Pseudo <"global_store_
848848
defm GLOBAL_STORE_BYTE_D16_HI : FLAT_Global_Store_Pseudo <"global_store_byte_d16_hi", VGPR_32>;
849849
defm GLOBAL_STORE_SHORT_D16_HI : FLAT_Global_Store_Pseudo <"global_store_short_d16_hi", VGPR_32>;
850850

851-
let is_flat_global = 1 in {
852851
defm GLOBAL_ATOMIC_CMPSWAP : FLAT_Global_Atomic_Pseudo <"global_atomic_cmpswap",
853852
VGPR_32, i32, v2i32, VReg_64>;
854853

@@ -947,9 +946,6 @@ let SubtargetPredicate = isGFX12Plus in {
947946
def GLOBAL_WBINV : FLAT_Global_Invalidate_Writeback<"global_wbinv">;
948947
} // End SubtargetPredicate = isGFX12Plus
949948

950-
} // End is_flat_global = 1
951-
952-
let SubtargetPredicate = HasFlatScratchInsts in {
953949
defm SCRATCH_LOAD_UBYTE : FLAT_Scratch_Load_Pseudo <"scratch_load_ubyte", VGPR_32>;
954950
defm SCRATCH_LOAD_SBYTE : FLAT_Scratch_Load_Pseudo <"scratch_load_sbyte", VGPR_32>;
955951
defm SCRATCH_LOAD_USHORT : FLAT_Scratch_Load_Pseudo <"scratch_load_ushort", VGPR_32>;
@@ -984,8 +980,6 @@ defm SCRATCH_LOAD_LDS_USHORT : FLAT_Scratch_Load_LDS_Pseudo <"scratch_load_lds_u
984980
defm SCRATCH_LOAD_LDS_SSHORT : FLAT_Scratch_Load_LDS_Pseudo <"scratch_load_lds_sshort">;
985981
defm SCRATCH_LOAD_LDS_DWORD : FLAT_Scratch_Load_LDS_Pseudo <"scratch_load_lds_dword">;
986982

987-
} // End SubtargetPredicate = HasFlatScratchInsts
988-
989983
let SubtargetPredicate = isGFX12Plus in {
990984
let WaveSizePredicate = isWave32 in {
991985
defm GLOBAL_LOAD_TR_B128_w32 : FLAT_Global_Load_Pseudo <"global_load_tr_b128_w32", VReg_128>;
@@ -997,7 +991,7 @@ let SubtargetPredicate = isGFX12Plus in {
997991
}
998992
} // End SubtargetPredicate = isGFX12Plus
999993

1000-
let SubtargetPredicate = isGFX10Plus, is_flat_global = 1 in {
994+
let SubtargetPredicate = isGFX10Plus in {
1001995
defm GLOBAL_ATOMIC_FCMPSWAP :
1002996
FLAT_Global_Atomic_Pseudo<"global_atomic_fcmpswap", VGPR_32, f32, v2f32, VReg_64>;
1003997
defm GLOBAL_ATOMIC_FMIN :
@@ -1010,9 +1004,8 @@ let SubtargetPredicate = isGFX10Plus, is_flat_global = 1 in {
10101004
FLAT_Global_Atomic_Pseudo<"global_atomic_fmin_x2", VReg_64, f64>;
10111005
defm GLOBAL_ATOMIC_FMAX_X2 :
10121006
FLAT_Global_Atomic_Pseudo<"global_atomic_fmax_x2", VReg_64, f64>;
1013-
} // End SubtargetPredicate = isGFX10Plus, is_flat_global = 1
1007+
} // End SubtargetPredicate = isGFX10Plus
10141008

1015-
let is_flat_global = 1 in {
10161009
let OtherPredicates = [HasAtomicFaddNoRtnInsts] in
10171010
defm GLOBAL_ATOMIC_ADD_F32 : FLAT_Global_Atomic_Pseudo_NO_RTN <
10181011
"global_atomic_add_f32", VGPR_32, f32
@@ -1029,7 +1022,6 @@ let OtherPredicates = [HasAtomicBufferGlobalPkAddF16Insts] in
10291022
defm GLOBAL_ATOMIC_PK_ADD_F16 : FLAT_Global_Atomic_Pseudo_RTN <
10301023
"global_atomic_pk_add_f16", VGPR_32, v2f16
10311024
>;
1032-
} // End is_flat_global = 1
10331025

10341026
//===----------------------------------------------------------------------===//
10351027
// Flat Patterns

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