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1 parent db4ba49 commit bfe355aCopy full SHA for bfe355a
llvm/test/CodeGen/Hexagon/swp-epilog-phi9.ll
@@ -4,7 +4,6 @@
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; blocks, when there are 3 epilog blocks. The Phi was scheduled in stage
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; 2, so the computation for the number of Phis needs to be adjusted when
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; the incoming prolog block is from prolog 0 or prolog 1.
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-; Note: the pipeliner no longer generates a 3 stage pipeline for this test.
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; Note: the pipeliner has been generating a 4-stage pipelined loop.
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; CHECK: loop0
@@ -52,7 +51,3 @@ declare i32 @llvm.hexagon.M2.mpy.ll.s0(i32, i32) #1
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; Function Attrs: nounwind readnone
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declare i32 @llvm.hexagon.M2.mpy.acc.sat.ll.s0(i32, i32, i32) #1
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-
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-attributes #0 = { nounwind "target-cpu"="hexagonv68" }
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-attributes #1 = { nounwind readnone }
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-attributes #2 = { nounwind }
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