[BPF] remove_truncate_9.ll - regenerate test checks

Author: RKSimon

llvm/test/CodeGen/BPF/remove_truncate_9.ll

@@ -1,5 +1,6 @@
-; RUN: llc -mcpu=v2 -mtriple=bpf < %s | FileCheck %s
-; RUN: llc -mcpu=v4 -mtriple=bpf < %s | FileCheck %s
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc -mcpu=v2 -mtriple=bpf < %s | FileCheck %s --check-prefixes=CHECK-V2
+; RUN: llc -mcpu=v4 -mtriple=bpf < %s | FileCheck %s --check-prefixes=CHECK-V4
 
 ; Zero extension instructions should be eliminated at instruction
 ; selection phase for all test cases below.
@@ -9,10 +10,36 @@
 ; generated code (<<= remains because %c is used by both call and
 ; lshr in a few test cases).
 
-; CHECK-NOT: &=
-; CHECK-NOT: >>=
-
 define void @shl_lshr_same_bb(ptr %p) {
+; CHECK-V2-LABEL: shl_lshr_same_bb:
+; CHECK-V2:       # %bb.0: # %entry
+; CHECK-V2-NEXT:    r1 = *(u8 *)(r1 + 0)
+; CHECK-V2-NEXT:    r5 = 1
+; CHECK-V2-NEXT:    if r1 == 0 goto LBB0_2
+; CHECK-V2-NEXT:  # %bb.1: # %entry
+; CHECK-V2-NEXT:    r5 = 0
+; CHECK-V2-NEXT:  LBB0_2: # %entry
+; CHECK-V2-NEXT:    r3 = r1
+; CHECK-V2-NEXT:    r3 <<= 56
+; CHECK-V2-NEXT:    r2 = r1
+; CHECK-V2-NEXT:    r4 = r1
+; CHECK-V2-NEXT:    call sink1
+; CHECK-V2-NEXT:    exit
+;
+; CHECK-V4-LABEL: shl_lshr_same_bb:
+; CHECK-V4:       # %bb.0: # %entry
+; CHECK-V4-NEXT:    w1 = *(u8 *)(r1 + 0)
+; CHECK-V4-NEXT:    w5 = 1
+; CHECK-V4-NEXT:    if w1 == 0 goto LBB0_2
+; CHECK-V4-NEXT:  # %bb.1: # %entry
+; CHECK-V4-NEXT:    w5 = 0
+; CHECK-V4-NEXT:  LBB0_2: # %entry
+; CHECK-V4-NEXT:    r3 = r1
+; CHECK-V4-NEXT:    r3 <<= 56
+; CHECK-V4-NEXT:    r2 = r1
+; CHECK-V4-NEXT:    r4 = r1
+; CHECK-V4-NEXT:    call sink1
+; CHECK-V4-NEXT:    exit
 entry:
   %a = load i8, ptr %p, align 1
   %b = zext i8 %a to i64
@@ -26,6 +53,35 @@ entry:
 }
 
 define void @shl_lshr_diff_bb(ptr %p) {
+; CHECK-V2-LABEL: shl_lshr_diff_bb:
+; CHECK-V2:       # %bb.0: # %entry
+; CHECK-V2-NEXT:    r1 = *(u16 *)(r1 + 0)
+; CHECK-V2-NEXT:    r5 = 1
+; CHECK-V2-NEXT:    if r1 == 0 goto LBB1_2
+; CHECK-V2-NEXT:  # %bb.1: # %entry
+; CHECK-V2-NEXT:    r5 = 0
+; CHECK-V2-NEXT:  LBB1_2: # %entry
+; CHECK-V2-NEXT:    r3 = r1
+; CHECK-V2-NEXT:    r3 <<= 48
+; CHECK-V2-NEXT:    r2 = r1
+; CHECK-V2-NEXT:    r4 = r1
+; CHECK-V2-NEXT:    call sink2
+; CHECK-V2-NEXT:    exit
+;
+; CHECK-V4-LABEL: shl_lshr_diff_bb:
+; CHECK-V4:       # %bb.0: # %entry
+; CHECK-V4-NEXT:    w1 = *(u16 *)(r1 + 0)
+; CHECK-V4-NEXT:    w5 = 1
+; CHECK-V4-NEXT:    if w1 == 0 goto LBB1_2
+; CHECK-V4-NEXT:  # %bb.1: # %entry
+; CHECK-V4-NEXT:    w5 = 0
+; CHECK-V4-NEXT:  LBB1_2: # %entry
+; CHECK-V4-NEXT:    r3 = r1
+; CHECK-V4-NEXT:    r3 <<= 48
+; CHECK-V4-NEXT:    r2 = r1
+; CHECK-V4-NEXT:    r4 = r1
+; CHECK-V4-NEXT:    call sink2
+; CHECK-V4-NEXT:    exit
 entry:
   %a = load i16, ptr %p, align 2
   %b = zext i16 %a to i64
@@ -45,6 +101,27 @@ next:
 }
 
 define void @load_zext_same_bb(ptr %p) {
+; CHECK-V2-LABEL: load_zext_same_bb:
+; CHECK-V2:       # %bb.0: # %entry
+; CHECK-V2-NEXT:    r1 = *(u8 *)(r1 + 0)
+; CHECK-V2-NEXT:    r2 = 1
+; CHECK-V2-NEXT:    if r1 == 0 goto LBB2_2
+; CHECK-V2-NEXT:  # %bb.1: # %entry
+; CHECK-V2-NEXT:    r2 = 0
+; CHECK-V2-NEXT:  LBB2_2: # %entry
+; CHECK-V2-NEXT:    call sink3
+; CHECK-V2-NEXT:    exit
+;
+; CHECK-V4-LABEL: load_zext_same_bb:
+; CHECK-V4:       # %bb.0: # %entry
+; CHECK-V4-NEXT:    w1 = *(u8 *)(r1 + 0)
+; CHECK-V4-NEXT:    w2 = 1
+; CHECK-V4-NEXT:    if w1 == 0 goto LBB2_2
+; CHECK-V4-NEXT:  # %bb.1: # %entry
+; CHECK-V4-NEXT:    w2 = 0
+; CHECK-V4-NEXT:  LBB2_2: # %entry
+; CHECK-V4-NEXT:    call sink3
+; CHECK-V4-NEXT:    exit
 entry:
   %a = load i8, ptr %p, align 1
   ; zext is implicit in this context
@@ -54,6 +131,27 @@ entry:
 }
 
 define void @load_zext_diff_bb(ptr %p) {
+; CHECK-V2-LABEL: load_zext_diff_bb:
+; CHECK-V2:       # %bb.0: # %entry
+; CHECK-V2-NEXT:    r1 = *(u8 *)(r1 + 0)
+; CHECK-V2-NEXT:    r2 = 1
+; CHECK-V2-NEXT:    if r1 == 0 goto LBB3_2
+; CHECK-V2-NEXT:  # %bb.1: # %next
+; CHECK-V2-NEXT:    r2 = 0
+; CHECK-V2-NEXT:  LBB3_2: # %next
+; CHECK-V2-NEXT:    call sink3
+; CHECK-V2-NEXT:    exit
+;
+; CHECK-V4-LABEL: load_zext_diff_bb:
+; CHECK-V4:       # %bb.0: # %entry
+; CHECK-V4-NEXT:    w1 = *(u8 *)(r1 + 0)
+; CHECK-V4-NEXT:    w2 = 1
+; CHECK-V4-NEXT:    if w1 == 0 goto LBB3_2
+; CHECK-V4-NEXT:  # %bb.1: # %next
+; CHECK-V4-NEXT:    w2 = 0
+; CHECK-V4-NEXT:  LBB3_2: # %next
+; CHECK-V4-NEXT:    call sink3
+; CHECK-V4-NEXT:    exit
 entry:
   %a = load i8, ptr %p, align 1
   br label %next
@@ -65,6 +163,27 @@ next:
 }
 
 define void @load_zext_diff_bb_2(ptr %p) {
+; CHECK-V2-LABEL: load_zext_diff_bb_2:
+; CHECK-V2:       # %bb.0: # %entry
+; CHECK-V2-NEXT:    r1 = *(u32 *)(r1 + 0)
+; CHECK-V2-NEXT:    r2 = 1
+; CHECK-V2-NEXT:    if r1 == 0 goto LBB4_2
+; CHECK-V2-NEXT:  # %bb.1: # %next
+; CHECK-V2-NEXT:    r2 = 0
+; CHECK-V2-NEXT:  LBB4_2: # %next
+; CHECK-V2-NEXT:    call sink4
+; CHECK-V2-NEXT:    exit
+;
+; CHECK-V4-LABEL: load_zext_diff_bb_2:
+; CHECK-V4:       # %bb.0: # %entry
+; CHECK-V4-NEXT:    w1 = *(u32 *)(r1 + 0)
+; CHECK-V4-NEXT:    w2 = 1
+; CHECK-V4-NEXT:    if w1 == 0 goto LBB4_2
+; CHECK-V4-NEXT:  # %bb.1: # %next
+; CHECK-V4-NEXT:    w2 = 0
+; CHECK-V4-NEXT:  LBB4_2: # %next
+; CHECK-V4-NEXT:    call sink4
+; CHECK-V4-NEXT:    exit
 entry:
   %a = load i32, ptr %p, align 4
   br label %next