Skip to content

Commit c0ef5b7

Browse files
committed
Use mayAlias on all memory and call instrs in the interval between FirstLoad and LastLoad
1 parent 2673ecf commit c0ef5b7

File tree

1 file changed

+36
-14
lines changed

1 file changed

+36
-14
lines changed

llvm/lib/Target/AArch64/AArch64InstrInfo.cpp

Lines changed: 36 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -22,6 +22,7 @@
2222
#include "llvm/ADT/STLExtras.h"
2323
#include "llvm/ADT/SmallSet.h"
2424
#include "llvm/ADT/SmallVector.h"
25+
#include "llvm/Analysis/AliasAnalysis.h"
2526
#include "llvm/CodeGen/CFIInstBuilder.h"
2627
#include "llvm/CodeGen/LivePhysRegs.h"
2728
#include "llvm/CodeGen/MachineBasicBlock.h"
@@ -7413,35 +7414,51 @@ static bool getMiscPatterns(MachineInstr &Root,
74137414
return false;
74147415
}
74157416

7416-
/// Check if there are any stores or calls between two instructions in the same
7417-
/// basic block.
7418-
static bool hasInterveningStoreOrCall(const MachineInstr *First,
7419-
const MachineInstr *Last) {
7417+
/// Collect all loads, stores and calls between `First` and `Last`.
7418+
/// `First` and `Last` must be within the same MBB.
7419+
static void getMemOps(const MachineInstr *First, const MachineInstr *Last,
7420+
SmallVectorImpl<const MachineInstr *> &MemOps) {
74207421
if (!First || !Last || First == Last)
7421-
return false;
7422+
return;
74227423

74237424
// Both instructions must be in the same basic block.
74247425
if (First->getParent() != Last->getParent())
7425-
return false;
7426+
return;
74267427

7427-
// Sanity check that First comes before Last.
74287428
const MachineBasicBlock *MBB = First->getParent();
74297429
auto InstrIt = First->getIterator();
74307430
auto LastIt = Last->getIterator();
7431+
MemOps.push_back(First);
74317432

74327433
for (; InstrIt != MBB->end(); ++InstrIt) {
74337434
if (InstrIt == LastIt)
74347435
break;
74357436

74367437
// Check for stores or calls that could interfere
7437-
if (InstrIt->mayStore() || InstrIt->isCall())
7438-
return true;
7438+
if (InstrIt->mayLoadOrStore() || InstrIt->isCall())
7439+
MemOps.push_back(&*InstrIt);
74397440
}
74407441

7441-
// If we reached the end of the basic block, our instructions must have not
7442-
// been ordered correctly and the analysis is invalid.
7443-
assert(InstrIt != MBB->end() &&
7442+
// If we have not iterated to `Last` the instructions must have not been
7443+
// ordered correctly.
7444+
assert(&*InstrIt == Last &&
74447445
"Got bad machine instructions, First should come before Last!");
7446+
7447+
MemOps.push_back(Last);
7448+
}
7449+
7450+
/// Check if a given MachineInstr `MIa` may alias with any of the instructions
7451+
/// in `MemInstrs`.
7452+
static bool mayAlias(const MachineInstr &MIa,
7453+
SmallVectorImpl<const MachineInstr *> &MemInstrs,
7454+
AliasAnalysis *AA) {
7455+
for (const MachineInstr *MIb : MemInstrs) {
7456+
if (MIa.mayAlias(AA, *MIb, /*UseTBAA*/ false)) {
7457+
MIb->dump();
7458+
return true;
7459+
}
7460+
}
7461+
74457462
return false;
74467463
}
74477464

@@ -7539,9 +7556,14 @@ static bool getGatherPattern(MachineInstr &Root,
75397556

75407557
const MachineInstr *FirstLoad = SortedLoads.front();
75417558
const MachineInstr *LastLoad = SortedLoads.back();
7559+
SmallVector<const MachineInstr *, 16> MemOps = {};
7560+
getMemOps(FirstLoad, LastLoad, MemOps);
75427561

7543-
if (hasInterveningStoreOrCall(FirstLoad, LastLoad))
7544-
return false;
7562+
// If there is any chance of aliasing, do not apply the pattern.
7563+
for (const MachineInstr *MemInstr : MemOps) {
7564+
if (mayAlias(*MemInstr, MemOps, nullptr))
7565+
return false;
7566+
}
75457567

75467568
switch (NumLanes) {
75477569
case 4:

0 commit comments

Comments
 (0)