Skip to content

Commit c17a914

Browse files
T-TieT-Tie
authored
[RISCV] Add Smdbltrp and Ssdbltrp extension (#111837)
Smdbltrp and Ssdbltrp supports are added in this PR. Specification link(Smdbltrp) : [https://github.com/riscv/riscv-isa-manual/blob/main/src/smdbltrp.adoc](url) Specification link(Ssdbltrp) : [https://github.com/riscv/riscv-isa-manual/blob/main/src/ssdbltrp.adoc](url)
1 parent 9061e6e commit c17a914

File tree

8 files changed

+46
-0
lines changed

8 files changed

+46
-0
lines changed

‎clang/test/Driver/print-supported-extensions-riscv.c‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -120,6 +120,7 @@
120120
// CHECK-NEXT: smaia 1.0 'Smaia' (Advanced Interrupt Architecture Machine Level)
121121
// CHECK-NEXT: smcdeleg 1.0 'Smcdeleg' (Counter Delegation Machine Level)
122122
// CHECK-NEXT: smcsrind 1.0 'Smcsrind' (Indirect CSR Access Machine Level)
123+
// CHECK-NEXT: smdbltrp 1.0 'Smdbltrp' (Double Trap Machine Level)
123124
// CHECK-NEXT: smepmp 1.0 'Smepmp' (Enhanced Physical Memory Protection)
124125
// CHECK-NEXT: smmpm 1.0 'Smmpm' (Machine-level Pointer Masking for M-mode)
125126
// CHECK-NEXT: smnpm 1.0 'Smnpm' (Machine-level Pointer Masking for next lower privilege mode)
@@ -131,6 +132,7 @@
131132
// CHECK-NEXT: sscofpmf 1.0 'Sscofpmf' (Count Overflow and Mode-Based Filtering)
132133
// CHECK-NEXT: sscounterenw 1.0 'Sscounterenw' (Support writeable scounteren enable bit for any hpmcounter that is not read-only zero)
133134
// CHECK-NEXT: sscsrind 1.0 'Sscsrind' (Indirect CSR Access Supervisor Level)
135+
// CHECK-NEXT: ssdbltrp 1.0 'Ssdbltrp' (Double Trap Supervisor Level)
134136
// CHECK-NEXT: ssnpm 1.0 'Ssnpm' (Supervisor-level Pointer Masking for next lower privilege mode)
135137
// CHECK-NEXT: sspm 1.0 'Sspm' (Indicates Supervisor-mode Pointer Masking)
136138
// CHECK-NEXT: ssqosid 1.0 'Ssqosid' (Quality-of-Service (QoS) Identifiers)

‎clang/test/Preprocessor/riscv-target-features.c‎

Lines changed: 18 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -30,6 +30,7 @@
3030
// CHECK-NOT: __riscv_smaia {{.*$}}
3131
// CHECK-NOT: __riscv_smcdeleg {{.*$}}
3232
// CHECK-NOT: __riscv_smcsrind {{.*$}}
33+
// CHECK-NOT: __riscv_smdbltrp {{.*$}}
3334
// CHECK-NOT: __riscv_smepmp {{.*$}}
3435
// CHECK-NOT: __riscv_smrnmi {{.*$}}
3536
// CHECK-NOT: __riscv_smstateen {{.*$}}
@@ -39,6 +40,7 @@
3940
// CHECK-NOT: __riscv_sscofpmf {{.*$}}
4041
// CHECK-NOT: __riscv_sscounterenw {{.*$}}
4142
// CHECK-NOT: __riscv_sscsrind {{.*$}}
43+
// CHECK-NOT: __riscv_ssdbltrp {{.*$}}
4244
// CHECK-NOT: __riscv_ssqosid{{.*$}}
4345
// CHECK-NOT: __riscv_ssstateen {{.*$}}
4446
// CHECK-NOT: __riscv_ssstrict {{.*$}}
@@ -1444,6 +1446,22 @@
14441446
// RUN: -o - | FileCheck --check-prefix=CHECK-SSCSRIND-EXT %s
14451447
// CHECK-SSCSRIND-EXT: __riscv_sscsrind 1000000{{$}}
14461448

1449+
// RUN: %clang --target=riscv32 \
1450+
// RUN: -march=rv32ismdbltrp1p0 -E -dM %s \
1451+
// RUN: -o - | FileCheck --check-prefix=CHECK-SMDBLTRP-EXT %s
1452+
// RUN: %clang --target=riscv64 \
1453+
// RUN: -march=rv64ismdbltrp1p0 -E -dM %s \
1454+
// RUN: -o - | FileCheck --check-prefix=CHECK-SMDBLTRP-EXT %s
1455+
// CHECK-SMDBLTRP-EXT: __riscv_smdbltrp 1000000{{$}}
1456+
1457+
// RUN: %clang --target=riscv32 \
1458+
// RUN: -march=rv32issdbltrp1p0 -E -dM %s \
1459+
// RUN: -o - | FileCheck --check-prefix=CHECK-SSDBLTRP-EXT %s
1460+
// RUN: %clang --target=riscv64 \
1461+
// RUN: -march=rv64issdbltrp1p0 -E -dM %s \
1462+
// RUN: -o - | FileCheck --check-prefix=CHECK-SSDBLTRP-EXT %s
1463+
// CHECK-SSDBLTRP-EXT: __riscv_ssdbltrp 1000000{{$}}
1464+
14471465
// RUN: %clang --target=riscv32 \
14481466
// RUN: -march=rv32i_ssqosid1p0 -E -dM %s \
14491467
// RUN: -o - | FileCheck --check-prefix=CHECK-SSQOSID-EXT %s

‎llvm/docs/RISCVUsage.rst‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -129,6 +129,7 @@ on support follow.
129129
``Smaia`` Supported
130130
``Smcdeleg`` Supported
131131
``Smcsrind`` Supported
132+
``Smdbltrp`` Supported
132133
``Smepmp`` Supported
133134
``Smmpm`` Supported
134135
``Smnpm`` Supported
@@ -140,6 +141,7 @@ on support follow.
140141
``Sscofpmf`` Assembly Support
141142
``Sscounterenw`` Assembly Support (`See note <#riscv-profiles-extensions-note>`__)
142143
``Sscsrind`` Supported
144+
``Ssdbltrp`` Supported
143145
``Ssnpm`` Supported
144146
``Sspm`` Supported
145147
``Ssqosid`` Assembly Support

‎llvm/docs/ReleaseNotes.md‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -186,6 +186,7 @@ Changes to the RISC-V Backend
186186
* Added `Smctr`, `Ssctr` and `Svvptc` extensions.
187187
* `-mcpu=syntacore-scr7` was added.
188188
* The `Zacas` extension is no longer marked as experimental.
189+
* Added Smdbltrp, Ssdbltrp extensions to -march.
189190
* The `Smmpm`, `Smnpm`, `Ssnpm`, `Supm`, and `Sspm` pointer masking extensions
190191
are no longer marked as experimental.
191192
* The `Sha` extension is now supported.

‎llvm/lib/Target/RISCV/RISCVFeatures.td‎

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -936,6 +936,13 @@ def FeatureStdExtSscsrind
936936
: RISCVExtension<"sscsrind", 1, 0,
937937
"'Sscsrind' (Indirect CSR Access Supervisor Level)">;
938938

939+
def FeatureStdExtSmdbltrp
940+
: RISCVExtension<"smdbltrp", 1, 0,
941+
"'Smdbltrp' (Double Trap Machine Level)">;
942+
def FeatureStdExtSsdbltrp
943+
: RISCVExtension<"ssdbltrp", 1, 0,
944+
"'Ssdbltrp' (Double Trap Supervisor Level)">;
945+
939946
def FeatureStdExtSmepmp
940947
: RISCVExtension<"smepmp", 1, 0,
941948
"'Smepmp' (Enhanced Physical Memory Protection)">;

‎llvm/test/CodeGen/RISCV/attributes.ll‎

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -117,6 +117,8 @@
117117
; RUN: llc -mtriple=riscv32 -mattr=+ssaia %s -o - | FileCheck --check-prefixes=CHECK,RV32SSAIA %s
118118
; RUN: llc -mtriple=riscv32 -mattr=+smcsrind %s -o - | FileCheck --check-prefixes=CHECK,RV32SMCSRIND %s
119119
; RUN: llc -mtriple=riscv32 -mattr=+sscsrind %s -o - | FileCheck --check-prefixes=CHECK,RV32SSCSRIND %s
120+
; RUN: llc -mtriple=riscv32 -mattr=+smdbltrp %s -o - | FileCheck --check-prefixes=CHECK,RV32SMDBLTRP %s
121+
; RUN: llc -mtriple=riscv32 -mattr=+ssdbltrp %s -o - | FileCheck --check-prefixes=CHECK,RV32SSDBLTRP %s
120122
; RUN: llc -mtriple=riscv32 -mattr=+ssqosid %s -o - | FileCheck --check-prefix=RV32SSQOSID %s
121123
; RUN: llc -mtriple=riscv32 -mattr=+smcdeleg %s -o - | FileCheck --check-prefixes=CHECK,RV32SMCDELEG %s
122124
; RUN: llc -mtriple=riscv32 -mattr=+smepmp %s -o - | FileCheck --check-prefixes=CHECK,RV32SMEPMP %s
@@ -263,6 +265,8 @@
263265
; RUN: llc -mtriple=riscv64 -mattr=+ssaia %s -o - | FileCheck --check-prefixes=CHECK,RV64SSAIA %s
264266
; RUN: llc -mtriple=riscv64 -mattr=+smcsrind %s -o - | FileCheck --check-prefixes=CHECK,RV64SMCSRIND %s
265267
; RUN: llc -mtriple=riscv64 -mattr=+sscsrind %s -o - | FileCheck --check-prefixes=CHECK,RV64SSCSRIND %s
268+
; RUN: llc -mtriple=riscv64 -mattr=+smdbltrp %s -o - | FileCheck --check-prefixes=CHECK,RV64SMDBLTRP %s
269+
; RUN: llc -mtriple=riscv64 -mattr=+ssdbltrp %s -o - | FileCheck --check-prefixes=CHECK,RV64SSDBLTRP %s
266270
; RUN: llc -mtriple=riscv64 -mattr=+ssqosid %s -o - | FileCheck --check-prefix=RV64SSQOSID %s
267271
; RUN: llc -mtriple=riscv64 -mattr=+smcdeleg %s -o - | FileCheck --check-prefixes=CHECK,RV64SMCDELEG %s
268272
; RUN: llc -mtriple=riscv64 -mattr=+smepmp %s -o - | FileCheck --check-prefixes=CHECK,RV64SMEPMP %s
@@ -415,6 +419,8 @@
415419
; RV32SSAIA: .attribute 5, "rv32i2p1_ssaia1p0"
416420
; RV32SMCSRIND: .attribute 5, "rv32i2p1_smcsrind1p0"
417421
; RV32SSCSRIND: .attribute 5, "rv32i2p1_sscsrind1p0"
422+
; RV32SMDBLTRP: .attribute 5, "rv32i2p1_smdbltrp1p0"
423+
; RV32SSDBLTRP: .attribute 5, "rv32i2p1_ssdbltrp1p0"
418424
; RV32SSQOSID: .attribute 5, "rv32i2p1_ssqosid1p0"
419425
; RV32SMCDELEG: .attribute 5, "rv32i2p1_smcdeleg1p0"
420426
; RV32SMEPMP: .attribute 5, "rv32i2p1_smepmp1p0"
@@ -559,6 +565,8 @@
559565
; RV64SSAIA: .attribute 5, "rv64i2p1_ssaia1p0"
560566
; RV64SMCSRIND: .attribute 5, "rv64i2p1_smcsrind1p0"
561567
; RV64SSCSRIND: .attribute 5, "rv64i2p1_sscsrind1p0"
568+
; RV64SMDBLTRP: .attribute 5, "rv64i2p1_smdbltrp1p0"
569+
; RV64SSDBLTRP: .attribute 5, "rv64i2p1_ssdbltrp1p0"
562570
; RV64SSQOSID: .attribute 5, "rv64i2p1_ssqosid1p0"
563571
; RV64SMCDELEG: .attribute 5, "rv64i2p1_smcdeleg1p0"
564572
; RV64SMEPMP: .attribute 5, "rv64i2p1_smepmp1p0"

‎llvm/test/MC/RISCV/attribute-arch.s‎

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -321,6 +321,12 @@
321321
.attribute arch, "rv32i_sscsrind1p0"
322322
# CHECK: attribute 5, "rv32i2p1_sscsrind1p0"
323323

324+
.attribute arch, "rv32i_smdbltrp1p0"
325+
# CHECK: attribute 5, "rv32i2p1_smdbltrp1p0"
326+
327+
.attribute arch, "rv32i_ssdbltrp1p0"
328+
# CHECK: attribute 5, "rv32i2p1_ssdbltrp1p0"
329+
324330
.attribute arch, "rv32i_smcdeleg1p0"
325331
# CHECK: attribute 5, "rv32i2p1_smcdeleg1p0"
326332

‎llvm/unittests/TargetParser/RISCVISAInfoTest.cpp‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1027,6 +1027,7 @@ R"(All available -march extensions for RISC-V
10271027
smaia 1.0
10281028
smcdeleg 1.0
10291029
smcsrind 1.0
1030+
smdbltrp 1.0
10301031
smepmp 1.0
10311032
smmpm 1.0
10321033
smnpm 1.0
@@ -1038,6 +1039,7 @@ R"(All available -march extensions for RISC-V
10381039
sscofpmf 1.0
10391040
sscounterenw 1.0
10401041
sscsrind 1.0
1042+
ssdbltrp 1.0
10411043
ssnpm 1.0
10421044
sspm 1.0
10431045
ssqosid 1.0

0 commit comments

Comments
 (0)