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Regenerate memset-pattern.ll after merge
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‎llvm/test/CodeGen/RISCV/memset-pattern.ll‎

Lines changed: 68 additions & 68 deletions
Original file line numberDiff line numberDiff line change
@@ -14,17 +14,17 @@
1414
define void @memset_1(ptr %a, i128 %value) nounwind {
1515
; RV32-BOTH-LABEL: memset_1:
1616
; RV32-BOTH: # %bb.0: # %storeloop.preheader
17-
; RV32-BOTH-NEXT: lw a2, 12(a1)
18-
; RV32-BOTH-NEXT: lw a3, 8(a1)
19-
; RV32-BOTH-NEXT: lw a4, 4(a1)
20-
; RV32-BOTH-NEXT: lw a1, 0(a1)
17+
; RV32-BOTH-NEXT: lw a2, 0(a1)
18+
; RV32-BOTH-NEXT: lw a3, 4(a1)
19+
; RV32-BOTH-NEXT: lw a4, 8(a1)
20+
; RV32-BOTH-NEXT: lw a1, 12(a1)
2121
; RV32-BOTH-NEXT: addi a5, a0, 16
2222
; RV32-BOTH-NEXT: .LBB0_1: # %storeloop
2323
; RV32-BOTH-NEXT: # =>This Inner Loop Header: Depth=1
24-
; RV32-BOTH-NEXT: sw a1, 0(a0)
25-
; RV32-BOTH-NEXT: sw a4, 4(a0)
26-
; RV32-BOTH-NEXT: sw a3, 8(a0)
27-
; RV32-BOTH-NEXT: sw a2, 12(a0)
24+
; RV32-BOTH-NEXT: sw a2, 0(a0)
25+
; RV32-BOTH-NEXT: sw a3, 4(a0)
26+
; RV32-BOTH-NEXT: sw a4, 8(a0)
27+
; RV32-BOTH-NEXT: sw a1, 12(a0)
2828
; RV32-BOTH-NEXT: addi a0, a0, 16
2929
; RV32-BOTH-NEXT: bne a0, a5, .LBB0_1
3030
; RV32-BOTH-NEXT: # %bb.2: # %split
@@ -52,41 +52,41 @@ define void @memset_1_noalign(ptr %a, i128 %value) nounwind {
5252
; RV32-NEXT: sw s0, 12(sp) # 4-byte Folded Spill
5353
; RV32-NEXT: sw s1, 8(sp) # 4-byte Folded Spill
5454
; RV32-NEXT: sw s2, 4(sp) # 4-byte Folded Spill
55-
; RV32-NEXT: lw a2, 12(a1)
56-
; RV32-NEXT: lw a3, 0(a1)
55+
; RV32-NEXT: lw a2, 0(a1)
56+
; RV32-NEXT: lw a3, 4(a1)
5757
; RV32-NEXT: lw a4, 8(a1)
58-
; RV32-NEXT: lw a1, 4(a1)
58+
; RV32-NEXT: lw a1, 12(a1)
5959
; RV32-NEXT: addi a5, a0, 16
60-
; RV32-NEXT: srli a6, a3, 24
61-
; RV32-NEXT: srli a7, a3, 16
62-
; RV32-NEXT: srli t0, a3, 8
63-
; RV32-NEXT: srli t1, a1, 24
64-
; RV32-NEXT: srli t2, a1, 16
65-
; RV32-NEXT: srli t3, a1, 8
60+
; RV32-NEXT: srli a6, a2, 24
61+
; RV32-NEXT: srli a7, a2, 16
62+
; RV32-NEXT: srli t0, a2, 8
63+
; RV32-NEXT: srli t1, a3, 24
64+
; RV32-NEXT: srli t2, a3, 16
65+
; RV32-NEXT: srli t3, a3, 8
6666
; RV32-NEXT: srli t4, a4, 24
6767
; RV32-NEXT: srli t5, a4, 16
6868
; RV32-NEXT: srli t6, a4, 8
69-
; RV32-NEXT: srli s0, a2, 24
70-
; RV32-NEXT: srli s1, a2, 16
71-
; RV32-NEXT: srli s2, a2, 8
69+
; RV32-NEXT: srli s0, a1, 24
70+
; RV32-NEXT: srli s1, a1, 16
71+
; RV32-NEXT: srli s2, a1, 8
7272
; RV32-NEXT: .LBB1_1: # %storeloop
7373
; RV32-NEXT: # =>This Inner Loop Header: Depth=1
74-
; RV32-NEXT: sb a3, 0(a0)
75-
; RV32-NEXT: sb a1, 4(a0)
76-
; RV32-NEXT: sb a6, 3(a0)
77-
; RV32-NEXT: sb a7, 2(a0)
74+
; RV32-NEXT: sb a2, 0(a0)
7875
; RV32-NEXT: sb t0, 1(a0)
79-
; RV32-NEXT: sb a4, 8(a0)
80-
; RV32-NEXT: sb t1, 7(a0)
81-
; RV32-NEXT: sb t2, 6(a0)
76+
; RV32-NEXT: sb a7, 2(a0)
77+
; RV32-NEXT: sb a6, 3(a0)
78+
; RV32-NEXT: sb a3, 4(a0)
8279
; RV32-NEXT: sb t3, 5(a0)
83-
; RV32-NEXT: sb a2, 12(a0)
84-
; RV32-NEXT: sb t4, 11(a0)
85-
; RV32-NEXT: sb t5, 10(a0)
80+
; RV32-NEXT: sb t2, 6(a0)
81+
; RV32-NEXT: sb t1, 7(a0)
82+
; RV32-NEXT: sb a4, 8(a0)
8683
; RV32-NEXT: sb t6, 9(a0)
87-
; RV32-NEXT: sb s0, 15(a0)
88-
; RV32-NEXT: sb s1, 14(a0)
84+
; RV32-NEXT: sb t5, 10(a0)
85+
; RV32-NEXT: sb t4, 11(a0)
86+
; RV32-NEXT: sb a1, 12(a0)
8987
; RV32-NEXT: sb s2, 13(a0)
88+
; RV32-NEXT: sb s1, 14(a0)
89+
; RV32-NEXT: sb s0, 15(a0)
9090
; RV32-NEXT: addi a0, a0, 16
9191
; RV32-NEXT: bne a0, a5, .LBB1_1
9292
; RV32-NEXT: # %bb.2: # %split
@@ -119,22 +119,22 @@ define void @memset_1_noalign(ptr %a, i128 %value) nounwind {
119119
; RV64-NEXT: srli s2, a2, 8
120120
; RV64-NEXT: .LBB1_1: # %storeloop
121121
; RV64-NEXT: # =>This Inner Loop Header: Depth=1
122-
; RV64-NEXT: sb a1, 0(a0)
123-
; RV64-NEXT: sb a2, 8(a0)
124-
; RV64-NEXT: sb a4, 7(a0)
125-
; RV64-NEXT: sb a5, 6(a0)
126-
; RV64-NEXT: sb a6, 5(a0)
127122
; RV64-NEXT: sb a7, 4(a0)
128-
; RV64-NEXT: sb t0, 3(a0)
129-
; RV64-NEXT: sb t1, 2(a0)
123+
; RV64-NEXT: sb a6, 5(a0)
124+
; RV64-NEXT: sb a5, 6(a0)
125+
; RV64-NEXT: sb a4, 7(a0)
126+
; RV64-NEXT: sb a1, 0(a0)
130127
; RV64-NEXT: sb t2, 1(a0)
131-
; RV64-NEXT: sb t3, 15(a0)
132-
; RV64-NEXT: sb t4, 14(a0)
133-
; RV64-NEXT: sb t5, 13(a0)
128+
; RV64-NEXT: sb t1, 2(a0)
129+
; RV64-NEXT: sb t0, 3(a0)
134130
; RV64-NEXT: sb t6, 12(a0)
135-
; RV64-NEXT: sb s0, 11(a0)
136-
; RV64-NEXT: sb s1, 10(a0)
131+
; RV64-NEXT: sb t5, 13(a0)
132+
; RV64-NEXT: sb t4, 14(a0)
133+
; RV64-NEXT: sb t3, 15(a0)
134+
; RV64-NEXT: sb a2, 8(a0)
137135
; RV64-NEXT: sb s2, 9(a0)
136+
; RV64-NEXT: sb s1, 10(a0)
137+
; RV64-NEXT: sb s0, 11(a0)
138138
; RV64-NEXT: addi a0, a0, 16
139139
; RV64-NEXT: bne a0, a3, .LBB1_1
140140
; RV64-NEXT: # %bb.2: # %split
@@ -146,17 +146,17 @@ define void @memset_1_noalign(ptr %a, i128 %value) nounwind {
146146
;
147147
; RV32-FAST-LABEL: memset_1_noalign:
148148
; RV32-FAST: # %bb.0: # %storeloop.preheader
149-
; RV32-FAST-NEXT: lw a2, 12(a1)
150-
; RV32-FAST-NEXT: lw a3, 8(a1)
151-
; RV32-FAST-NEXT: lw a4, 4(a1)
152-
; RV32-FAST-NEXT: lw a1, 0(a1)
149+
; RV32-FAST-NEXT: lw a2, 0(a1)
150+
; RV32-FAST-NEXT: lw a3, 4(a1)
151+
; RV32-FAST-NEXT: lw a4, 8(a1)
152+
; RV32-FAST-NEXT: lw a1, 12(a1)
153153
; RV32-FAST-NEXT: addi a5, a0, 16
154154
; RV32-FAST-NEXT: .LBB1_1: # %storeloop
155155
; RV32-FAST-NEXT: # =>This Inner Loop Header: Depth=1
156-
; RV32-FAST-NEXT: sw a1, 0(a0)
157-
; RV32-FAST-NEXT: sw a4, 4(a0)
158-
; RV32-FAST-NEXT: sw a3, 8(a0)
159-
; RV32-FAST-NEXT: sw a2, 12(a0)
156+
; RV32-FAST-NEXT: sw a2, 0(a0)
157+
; RV32-FAST-NEXT: sw a3, 4(a0)
158+
; RV32-FAST-NEXT: sw a4, 8(a0)
159+
; RV32-FAST-NEXT: sw a1, 12(a0)
160160
; RV32-FAST-NEXT: addi a0, a0, 16
161161
; RV32-FAST-NEXT: bne a0, a5, .LBB1_1
162162
; RV32-FAST-NEXT: # %bb.2: # %split
@@ -180,17 +180,17 @@ define void @memset_1_noalign(ptr %a, i128 %value) nounwind {
180180
define void @memset_4(ptr %a, i128 %value) nounwind {
181181
; RV32-BOTH-LABEL: memset_4:
182182
; RV32-BOTH: # %bb.0: # %storeloop.preheader
183-
; RV32-BOTH-NEXT: lw a2, 12(a1)
184-
; RV32-BOTH-NEXT: lw a3, 8(a1)
185-
; RV32-BOTH-NEXT: lw a4, 4(a1)
186-
; RV32-BOTH-NEXT: lw a1, 0(a1)
183+
; RV32-BOTH-NEXT: lw a2, 0(a1)
184+
; RV32-BOTH-NEXT: lw a3, 4(a1)
185+
; RV32-BOTH-NEXT: lw a4, 8(a1)
186+
; RV32-BOTH-NEXT: lw a1, 12(a1)
187187
; RV32-BOTH-NEXT: addi a5, a0, 64
188188
; RV32-BOTH-NEXT: .LBB2_1: # %storeloop
189189
; RV32-BOTH-NEXT: # =>This Inner Loop Header: Depth=1
190-
; RV32-BOTH-NEXT: sw a1, 0(a0)
191-
; RV32-BOTH-NEXT: sw a4, 4(a0)
192-
; RV32-BOTH-NEXT: sw a3, 8(a0)
193-
; RV32-BOTH-NEXT: sw a2, 12(a0)
190+
; RV32-BOTH-NEXT: sw a2, 0(a0)
191+
; RV32-BOTH-NEXT: sw a3, 4(a0)
192+
; RV32-BOTH-NEXT: sw a4, 8(a0)
193+
; RV32-BOTH-NEXT: sw a1, 12(a0)
194194
; RV32-BOTH-NEXT: addi a0, a0, 16
195195
; RV32-BOTH-NEXT: bne a0, a5, .LBB2_1
196196
; RV32-BOTH-NEXT: # %bb.2: # %split
@@ -217,18 +217,18 @@ define void @memset_x(ptr %a, i128 %value, i64 %x) nounwind {
217217
; RV32-BOTH-NEXT: or a3, a2, a3
218218
; RV32-BOTH-NEXT: beqz a3, .LBB3_3
219219
; RV32-BOTH-NEXT: # %bb.1: # %storeloop.preheader
220-
; RV32-BOTH-NEXT: lw a3, 12(a1)
221-
; RV32-BOTH-NEXT: lw a4, 8(a1)
222-
; RV32-BOTH-NEXT: lw a5, 4(a1)
223-
; RV32-BOTH-NEXT: lw a1, 0(a1)
220+
; RV32-BOTH-NEXT: lw a3, 0(a1)
221+
; RV32-BOTH-NEXT: lw a4, 4(a1)
222+
; RV32-BOTH-NEXT: lw a5, 8(a1)
223+
; RV32-BOTH-NEXT: lw a1, 12(a1)
224224
; RV32-BOTH-NEXT: slli a2, a2, 4
225225
; RV32-BOTH-NEXT: add a2, a0, a2
226226
; RV32-BOTH-NEXT: .LBB3_2: # %storeloop
227227
; RV32-BOTH-NEXT: # =>This Inner Loop Header: Depth=1
228-
; RV32-BOTH-NEXT: sw a1, 0(a0)
229-
; RV32-BOTH-NEXT: sw a5, 4(a0)
230-
; RV32-BOTH-NEXT: sw a4, 8(a0)
231-
; RV32-BOTH-NEXT: sw a3, 12(a0)
228+
; RV32-BOTH-NEXT: sw a3, 0(a0)
229+
; RV32-BOTH-NEXT: sw a4, 4(a0)
230+
; RV32-BOTH-NEXT: sw a5, 8(a0)
231+
; RV32-BOTH-NEXT: sw a1, 12(a0)
232232
; RV32-BOTH-NEXT: addi a0, a0, 16
233233
; RV32-BOTH-NEXT: bne a0, a2, .LBB3_2
234234
; RV32-BOTH-NEXT: .LBB3_3: # %split

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