Skip to content

Commit c1bb7af

Browse files
use MemoryVT instead of custom c++ predicate
1 parent 1e910d3 commit c1bb7af

File tree

2 files changed

+12
-15
lines changed

2 files changed

+12
-15
lines changed

llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp

Lines changed: 0 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -77,8 +77,6 @@ class X86InstructionSelector : public InstructionSelector {
7777
unsigned getPtrLoadStoreOp(const LLT &Ty, const RegisterBank &RB,
7878
unsigned Opc) const;
7979

80-
bool checkMemoryOpSize(const MachineInstr &MI, LLT Sz) const;
81-
8280
bool selectLoadStoreOp(MachineInstr &I, MachineRegisterInfo &MRI,
8381
MachineFunction &MF) const;
8482
bool selectFrameIndexOrGep(MachineInstr &I, MachineRegisterInfo &MRI,
@@ -357,13 +355,6 @@ bool X86InstructionSelector::selectCopy(MachineInstr &I,
357355
return true;
358356
}
359357

360-
bool X86InstructionSelector::checkMemoryOpSize(const MachineInstr &MI,
361-
LLT Sz) const {
362-
assert(MI.hasOneMemOperand() &&
363-
"Expected load/store to have only one mem op!");
364-
return (*MI.memoperands_begin())->getMemoryType() == Sz;
365-
}
366-
367358
bool X86InstructionSelector::select(MachineInstr &I) {
368359
assert(I.getParent() && "Instruction should be in a basic block!");
369360
assert(I.getParent()->getParent() && "Instruction should be in a function!");

llvm/lib/Target/X86/X86InstrFragments.td

Lines changed: 12 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -842,19 +842,22 @@ def X86fldf80 : PatFrag<(ops node:$ptr), (X86fld node:$ptr), [{
842842
def X86fild16 : PatFrag<(ops node:$ptr), (X86fild node:$ptr), [{
843843
return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i16;
844844
}]> {
845-
let GISelPredicateCode = [{ return checkMemoryOpSize(MI, LLT::scalar(16)); }];
845+
let IsStore = true;
846+
let MemoryVT = i16;
846847
}
847848

848849
def X86fild32 : PatFrag<(ops node:$ptr), (X86fild node:$ptr), [{
849850
return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i32;
850851
}]> {
851-
let GISelPredicateCode = [{ return checkMemoryOpSize(MI, LLT::scalar(32)); }];
852+
let IsStore = true;
853+
let MemoryVT = i32;
852854
}
853855

854856
def X86fild64 : PatFrag<(ops node:$ptr), (X86fild node:$ptr), [{
855857
return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i64;
856858
}]> {
857-
let GISelPredicateCode = [{ return checkMemoryOpSize(MI, LLT::scalar(64)); }];
859+
let IsStore = true;
860+
let MemoryVT = i64;
858861
}
859862

860863
def X86fist32 : PatFrag<(ops node:$val, node:$ptr),
@@ -871,21 +874,24 @@ def X86fp_to_i16mem : PatFrag<(ops node:$val, node:$ptr),
871874
(X86fp_to_mem node:$val, node:$ptr), [{
872875
return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i16;
873876
}]> {
874-
let GISelPredicateCode = [{ return checkMemoryOpSize(MI, LLT::scalar(16)); }];
877+
let IsStore = true;
878+
let MemoryVT = i16;
875879
}
876880

877881
def X86fp_to_i32mem : PatFrag<(ops node:$val, node:$ptr),
878882
(X86fp_to_mem node:$val, node:$ptr), [{
879883
return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i32;
880884
}]> {
881-
let GISelPredicateCode = [{ return checkMemoryOpSize(MI, LLT::scalar(32)); }];
885+
let IsStore = true;
886+
let MemoryVT = i32;
882887
}
883888

884889
def X86fp_to_i64mem : PatFrag<(ops node:$val, node:$ptr),
885890
(X86fp_to_mem node:$val, node:$ptr), [{
886891
return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i64;
887892
}]> {
888-
let GISelPredicateCode = [{ return checkMemoryOpSize(MI, LLT::scalar(64)); }];
893+
let IsStore = true;
894+
let MemoryVT = i64;
889895
}
890896

891897
//===----------------------------------------------------------------------===//

0 commit comments

Comments
 (0)