Remove TargetTransformInfo::Model

s-barannikov · s-barannikov · commit c1c933fded6b · 2025-04-22T12:41:29.000+03:00
diff --git a/llvm/include/llvm/Analysis/TargetTransformInfo.h b/llvm/include/llvm/Analysis/TargetTransformInfo.h
diff --git a/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h b/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
@@ -31,7 +31,7 @@ class Function;
 
 /// Base class for use as a mix-in that aids implementing
 /// a TargetTransformInfo-compatible class.
-class TargetTransformInfoImplBase {
+class TargetTransformInfoImplBase : public TTI::Concept {
 
 protected:
   typedef TargetTransformInfo TTI;
diff --git a/llvm/lib/Analysis/TargetTransformInfo.cpp b/llvm/lib/Analysis/TargetTransformInfo.cpp
@@ -57,6 +57,9 @@ struct NoTTIImpl : TargetTransformInfoImplCRTPBase<NoTTIImpl> {
 };
 } // namespace
 
+TargetTransformInfo::TargetTransformInfo(std::unique_ptr<Concept> Impl)
+    : TTIImpl(std::move(Impl)) {}
+
 bool HardwareLoopInfo::canAnalyze(LoopInfo &LI) {
   // If the loop has irreducible control flow, it can not be converted to
   // Hardware loop.
@@ -199,7 +202,7 @@ bool HardwareLoopInfo::isHardwareLoopCandidate(ScalarEvolution &SE,
 }
 
 TargetTransformInfo::TargetTransformInfo(const DataLayout &DL)
-    : TTIImpl(new Model<NoTTIImpl>(NoTTIImpl(DL))) {}
+    : TTIImpl(std::make_unique<NoTTIImpl>(DL)) {}
 
 TargetTransformInfo::~TargetTransformInfo() = default;
 
diff --git a/llvm/lib/CodeGen/CodeGenTargetMachineImpl.cpp b/llvm/lib/CodeGen/CodeGenTargetMachineImpl.cpp
@@ -103,7 +103,7 @@ CodeGenTargetMachineImpl::CodeGenTargetMachineImpl(
 
 TargetTransformInfo
 CodeGenTargetMachineImpl::getTargetTransformInfo(const Function &F) const {
-  return TargetTransformInfo(BasicTTIImpl(this, F));
+  return TargetTransformInfo(std::make_unique<BasicTTIImpl>(this, F));
 }
 
 /// addPassesToX helper drives creation and initialization of TargetPassConfig.
diff --git a/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp b/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
@@ -582,7 +582,7 @@ void AArch64TargetMachine::registerPassBuilderCallbacks(PassBuilder &PB) {
 
 TargetTransformInfo
 AArch64TargetMachine::getTargetTransformInfo(const Function &F) const {
-  return TargetTransformInfo(AArch64TTIImpl(this, F));
+  return TargetTransformInfo(std::make_unique<AArch64TTIImpl>(this, F));
 }
 
 TargetPassConfig *AArch64TargetMachine::createPassConfig(PassManagerBase &PM) {
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
@@ -1070,7 +1070,7 @@ GCNTargetMachine::getSubtargetImpl(const Function &F) const {
 
 TargetTransformInfo
 GCNTargetMachine::getTargetTransformInfo(const Function &F) const {
-  return TargetTransformInfo(GCNTTIImpl(this, F));
+  return TargetTransformInfo(std::make_unique<GCNTTIImpl>(this, F));
 }
 
 Error GCNTargetMachine::buildCodeGenPipeline(
diff --git a/llvm/lib/Target/AMDGPU/R600TargetMachine.cpp b/llvm/lib/Target/AMDGPU/R600TargetMachine.cpp
@@ -87,7 +87,7 @@ R600TargetMachine::getSubtargetImpl(const Function &F) const {
 
 TargetTransformInfo
 R600TargetMachine::getTargetTransformInfo(const Function &F) const {
-  return TargetTransformInfo(R600TTIImpl(this, F));
+  return TargetTransformInfo(std::make_unique<R600TTIImpl>(this, F));
 }
 
 ScheduleDAGInstrs *
diff --git a/llvm/lib/Target/ARC/ARCTargetMachine.cpp b/llvm/lib/Target/ARC/ARCTargetMachine.cpp
@@ -103,5 +103,5 @@ extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeARCTarget() {
 
 TargetTransformInfo
 ARCTargetMachine::getTargetTransformInfo(const Function &F) const {
-  return TargetTransformInfo(ARCTTIImpl(this, F));
+  return TargetTransformInfo(std::make_unique<ARCTTIImpl>(this, F));
 }
diff --git a/llvm/lib/Target/ARM/ARMTargetMachine.cpp b/llvm/lib/Target/ARM/ARMTargetMachine.cpp
@@ -322,7 +322,7 @@ ARMBaseTargetMachine::getSubtargetImpl(const Function &F) const {
 
 TargetTransformInfo
 ARMBaseTargetMachine::getTargetTransformInfo(const Function &F) const {
-  return TargetTransformInfo(ARMTTIImpl(this, F));
+  return TargetTransformInfo(std::make_unique<ARMTTIImpl>(this, F));
 }
 
 ScheduleDAGInstrs *
diff --git a/llvm/lib/Target/BPF/BPFTargetMachine.cpp b/llvm/lib/Target/BPF/BPFTargetMachine.cpp
@@ -154,7 +154,7 @@ void BPFPassConfig::addIRPasses() {
 
 TargetTransformInfo
 BPFTargetMachine::getTargetTransformInfo(const Function &F) const {
-  return TargetTransformInfo(BPFTTIImpl(this, F));
+  return TargetTransformInfo(std::make_unique<BPFTTIImpl>(this, F));
 }
 
 // Install an instruction selector pass using
diff --git a/llvm/lib/Target/DirectX/DirectXTargetMachine.cpp b/llvm/lib/Target/DirectX/DirectXTargetMachine.cpp
@@ -187,7 +187,7 @@ DirectXTargetMachine::getSubtargetImpl(const Function &) const {
 
 TargetTransformInfo
 DirectXTargetMachine::getTargetTransformInfo(const Function &F) const {
-  return TargetTransformInfo(DirectXTTIImpl(this, F));
+  return TargetTransformInfo(std::make_unique<DirectXTTIImpl>(this, F));
 }
 
 DirectXTargetLowering::DirectXTargetLowering(const DirectXTargetMachine &TM,
diff --git a/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp b/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
@@ -286,7 +286,7 @@ void HexagonTargetMachine::registerPassBuilderCallbacks(PassBuilder &PB) {
 
 TargetTransformInfo
 HexagonTargetMachine::getTargetTransformInfo(const Function &F) const {
-  return TargetTransformInfo(HexagonTTIImpl(this, F));
+  return TargetTransformInfo(std::make_unique<HexagonTTIImpl>(this, F));
 }
 
 MachineFunctionInfo *HexagonTargetMachine::createMachineFunctionInfo(
diff --git a/llvm/lib/Target/Lanai/LanaiTargetMachine.cpp b/llvm/lib/Target/Lanai/LanaiTargetMachine.cpp
@@ -67,7 +67,7 @@ LanaiTargetMachine::LanaiTargetMachine(
 
 TargetTransformInfo
 LanaiTargetMachine::getTargetTransformInfo(const Function &F) const {
-  return TargetTransformInfo(LanaiTTIImpl(this, F));
+  return TargetTransformInfo(std::make_unique<LanaiTTIImpl>(this, F));
 }
 
 MachineFunctionInfo *LanaiTargetMachine::createMachineFunctionInfo(
diff --git a/llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp b/llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp
@@ -196,7 +196,7 @@ bool LoongArchPassConfig::addInstSelector() {
 
 TargetTransformInfo
 LoongArchTargetMachine::getTargetTransformInfo(const Function &F) const {
-  return TargetTransformInfo(LoongArchTTIImpl(this, F));
+  return TargetTransformInfo(std::make_unique<LoongArchTTIImpl>(this, F));
 }
 
 void LoongArchPassConfig::addPreEmitPass() { addPass(&BranchRelaxationPassID); }
diff --git a/llvm/lib/Target/Mips/MipsTargetMachine.cpp b/llvm/lib/Target/Mips/MipsTargetMachine.cpp
@@ -298,7 +298,7 @@ MipsTargetMachine::getTargetTransformInfo(const Function &F) const {
   }
 
   LLVM_DEBUG(errs() << "Target Transform Info Pass Added\n");
-  return TargetTransformInfo(MipsTTIImpl(this, F));
+  return TargetTransformInfo(std::make_unique<MipsTTIImpl>(this, F));
 }
 
 MachineFunctionInfo *MipsTargetMachine::createMachineFunctionInfo(
diff --git a/llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp b/llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
@@ -266,7 +266,7 @@ void NVPTXTargetMachine::registerPassBuilderCallbacks(PassBuilder &PB) {
 
 TargetTransformInfo
 NVPTXTargetMachine::getTargetTransformInfo(const Function &F) const {
-  return TargetTransformInfo(NVPTXTTIImpl(this, F));
+  return TargetTransformInfo(std::make_unique<NVPTXTTIImpl>(this, F));
 }
 
 std::pair<const Value *, unsigned>
diff --git a/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp b/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
@@ -604,7 +604,7 @@ void PPCPassConfig::addPreEmitPass2() {
 
 TargetTransformInfo
 PPCTargetMachine::getTargetTransformInfo(const Function &F) const {
-  return TargetTransformInfo(PPCTTIImpl(this, F));
+  return TargetTransformInfo(std::make_unique<PPCTTIImpl>(this, F));
 }
 
 bool PPCTargetMachine::isLittleEndian() const {
diff --git a/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp b/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
@@ -344,14 +344,18 @@ bool PPCTTIImpl::isHardwareLoopProfitable(Loop *L, ScalarEvolution &SE,
   TargetSchedModel SchedModel;
   SchedModel.init(ST);
 
+  // FIXME: Sure there is no other way to get TTI? This should be cheap though.
+  TargetTransformInfo TTI =
+      TM.getTargetTransformInfo(*L->getHeader()->getParent());
+
   // Do not convert small short loops to CTR loop.
   unsigned ConstTripCount = SE.getSmallConstantTripCount(L);
   if (ConstTripCount && ConstTripCount < SmallCTRLoopThreshold) {
     SmallPtrSet<const Value *, 32> EphValues;
     CodeMetrics::collectEphemeralValues(L, &AC, EphValues);
     CodeMetrics Metrics;
     for (BasicBlock *BB : L->blocks())
-      Metrics.analyzeBasicBlock(BB, *this, EphValues);
+      Metrics.analyzeBasicBlock(BB, TTI, EphValues);
     // 6 is an approximate latency for the mtctr instruction.
     if (Metrics.NumInsts <= (6 * SchedModel.getIssueWidth()))
       return false;
diff --git a/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp b/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
@@ -281,7 +281,7 @@ MachineFunctionInfo *RISCVTargetMachine::createMachineFunctionInfo(
 
 TargetTransformInfo
 RISCVTargetMachine::getTargetTransformInfo(const Function &F) const {
-  return TargetTransformInfo(RISCVTTIImpl(this, F));
+  return TargetTransformInfo(std::make_unique<RISCVTTIImpl>(this, F));
 }
 
 // A RISC-V hart has a single byte-addressable address space of 2^XLEN bytes
diff --git a/llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp b/llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
@@ -179,7 +179,7 @@ void SPIRVPassConfig::addPostRegAlloc() {
 
 TargetTransformInfo
 SPIRVTargetMachine::getTargetTransformInfo(const Function &F) const {
-  return TargetTransformInfo(SPIRVTTIImpl(this, F));
+  return TargetTransformInfo(std::make_unique<SPIRVTTIImpl>(this, F));
 }
 
 TargetPassConfig *SPIRVTargetMachine::createPassConfig(PassManagerBase &PM) {
diff --git a/llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp b/llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp
@@ -332,7 +332,7 @@ TargetPassConfig *SystemZTargetMachine::createPassConfig(PassManagerBase &PM) {
 
 TargetTransformInfo
 SystemZTargetMachine::getTargetTransformInfo(const Function &F) const {
-  return TargetTransformInfo(SystemZTTIImpl(this, F));
+  return TargetTransformInfo(std::make_unique<SystemZTTIImpl>(this, F));
 }
 
 MachineFunctionInfo *SystemZTargetMachine::createMachineFunctionInfo(
diff --git a/llvm/lib/Target/VE/VETargetMachine.cpp b/llvm/lib/Target/VE/VETargetMachine.cpp
@@ -101,7 +101,7 @@ VETargetMachine::~VETargetMachine() = default;
 
 TargetTransformInfo
 VETargetMachine::getTargetTransformInfo(const Function &F) const {
-  return TargetTransformInfo(VETTIImpl(this, F));
+  return TargetTransformInfo(std::make_unique<VETTIImpl>(this, F));
 }
 
 MachineFunctionInfo *VETargetMachine::createMachineFunctionInfo(
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
@@ -385,7 +385,7 @@ MachineFunctionInfo *WebAssemblyTargetMachine::createMachineFunctionInfo(
 
 TargetTransformInfo
 WebAssemblyTargetMachine::getTargetTransformInfo(const Function &F) const {
-  return TargetTransformInfo(WebAssemblyTTIImpl(this, F));
+  return TargetTransformInfo(std::make_unique<WebAssemblyTTIImpl>(this, F));
 }
 
 TargetPassConfig *
diff --git a/llvm/lib/Target/X86/X86TargetMachine.cpp b/llvm/lib/Target/X86/X86TargetMachine.cpp
@@ -394,7 +394,7 @@ X86TargetMachine::createPostMachineScheduler(MachineSchedContext *C) const {
 
 TargetTransformInfo
 X86TargetMachine::getTargetTransformInfo(const Function &F) const {
-  return TargetTransformInfo(X86TTIImpl(this, F));
+  return TargetTransformInfo(std::make_unique<X86TTIImpl>(this, F));
 }
 
 //===----------------------------------------------------------------------===//
diff --git a/llvm/lib/Target/XCore/XCoreTargetMachine.cpp b/llvm/lib/Target/XCore/XCoreTargetMachine.cpp
@@ -111,7 +111,7 @@ extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeXCoreTarget() {
 
 TargetTransformInfo
 XCoreTargetMachine::getTargetTransformInfo(const Function &F) const {
-  return TargetTransformInfo(XCoreTTIImpl(this, F));
+  return TargetTransformInfo(std::make_unique<XCoreTTIImpl>(this, F));
 }
 
 MachineFunctionInfo *XCoreTargetMachine::createMachineFunctionInfo(

Original file line number	Diff line number	Diff line change
`@@ -103,7 +103,7 @@ CodeGenTargetMachineImpl::CodeGenTargetMachineImpl(`
`103`	`103`
`104`	`104`	`TargetTransformInfo`
`105`	`105`	`CodeGenTargetMachineImpl::getTargetTransformInfo(const Function &F) const {`
`106`		`- return TargetTransformInfo(BasicTTIImpl(this, F));`
	`106`	`+ return TargetTransformInfo(std::make_unique<BasicTTIImpl>(this, F));`
`107`	`107`	`}`
`108`	`108`
`109`	`109`	`/// addPassesToX helper drives creation and initialization of TargetPassConfig.`
Original file line number	Diff line number	Diff line change
`@@ -582,7 +582,7 @@ void AArch64TargetMachine::registerPassBuilderCallbacks(PassBuilder &PB) {`
`582`	`582`
`583`	`583`	`TargetTransformInfo`
`584`	`584`	`AArch64TargetMachine::getTargetTransformInfo(const Function &F) const {`
`585`		`- return TargetTransformInfo(AArch64TTIImpl(this, F));`
	`585`	`+ return TargetTransformInfo(std::make_unique<AArch64TTIImpl>(this, F));`
`586`	`586`	`}`
`587`	`587`
`588`	`588`	`TargetPassConfig *AArch64TargetMachine::createPassConfig(PassManagerBase &PM) {`
Original file line number	Diff line number	Diff line change
`@@ -1070,7 +1070,7 @@ GCNTargetMachine::getSubtargetImpl(const Function &F) const {`
`1070`	`1070`
`1071`	`1071`	`TargetTransformInfo`
`1072`	`1072`	`GCNTargetMachine::getTargetTransformInfo(const Function &F) const {`
`1073`		`- return TargetTransformInfo(GCNTTIImpl(this, F));`
	`1073`	`+ return TargetTransformInfo(std::make_unique<GCNTTIImpl>(this, F));`
`1074`	`1074`	`}`
`1075`	`1075`
`1076`	`1076`	`Error GCNTargetMachine::buildCodeGenPipeline(`
Original file line number	Diff line number	Diff line change
`@@ -87,7 +87,7 @@ R600TargetMachine::getSubtargetImpl(const Function &F) const {`
`87`	`87`
`88`	`88`	`TargetTransformInfo`
`89`	`89`	`R600TargetMachine::getTargetTransformInfo(const Function &F) const {`
`90`		`- return TargetTransformInfo(R600TTIImpl(this, F));`
	`90`	`+ return TargetTransformInfo(std::make_unique<R600TTIImpl>(this, F));`
`91`	`91`	`}`
`92`	`92`
`93`	`93`	`ScheduleDAGInstrs *`
Original file line number	Diff line number	Diff line change
`@@ -103,5 +103,5 @@ extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeARCTarget() {`
`103`	`103`
`104`	`104`	`TargetTransformInfo`
`105`	`105`	`ARCTargetMachine::getTargetTransformInfo(const Function &F) const {`
`106`		`- return TargetTransformInfo(ARCTTIImpl(this, F));`
	`106`	`+ return TargetTransformInfo(std::make_unique<ARCTTIImpl>(this, F));`
`107`	`107`	`}`
Original file line number	Diff line number	Diff line change
`@@ -322,7 +322,7 @@ ARMBaseTargetMachine::getSubtargetImpl(const Function &F) const {`
`322`	`322`
`323`	`323`	`TargetTransformInfo`
`324`	`324`	`ARMBaseTargetMachine::getTargetTransformInfo(const Function &F) const {`
`325`		`- return TargetTransformInfo(ARMTTIImpl(this, F));`
	`325`	`+ return TargetTransformInfo(std::make_unique<ARMTTIImpl>(this, F));`
`326`	`326`	`}`
`327`	`327`
`328`	`328`	`ScheduleDAGInstrs *`
Original file line number	Diff line number	Diff line change
`@@ -154,7 +154,7 @@ void BPFPassConfig::addIRPasses() {`
`154`	`154`
`155`	`155`	`TargetTransformInfo`
`156`	`156`	`BPFTargetMachine::getTargetTransformInfo(const Function &F) const {`
`157`		`- return TargetTransformInfo(BPFTTIImpl(this, F));`
	`157`	`+ return TargetTransformInfo(std::make_unique<BPFTTIImpl>(this, F));`
`158`	`158`	`}`
`159`	`159`
`160`	`160`	`// Install an instruction selector pass using`