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Change-Id: I4937190c734c5adcdd73d81278d82a53aec4c4c9
1 parent d2bd642 commit c1d867c

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+74
-93
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3 files changed

+74
-93
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‎llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp‎

Lines changed: 19 additions & 38 deletions
Original file line numberDiff line numberDiff line change
@@ -2367,7 +2367,6 @@ Value *InstCombinerImpl::reassociateBooleanAndOr(Value *LHS, Value *X, Value *Y,
23672367
Instruction &I, bool IsAnd,
23682368
bool RHSIsLogical) {
23692369
Instruction::BinaryOps Opcode = IsAnd ? Instruction::And : Instruction::Or;
2370-
23712370
// LHS bop (X lop Y) --> (LHS bop X) lop Y
23722371
// LHS bop (X bop Y) --> (LHS bop X) bop Y
23732372
if (Value *Res = foldBooleanAndOr(LHS, X, I, IsAnd, /*IsLogical=*/false))
@@ -3666,9 +3665,9 @@ static std::optional<DecomposedBitMaskMul> matchBitmaskMul(Value *V) {
36663665
return std::nullopt;
36673666
}
36683667

3669-
// (A & N) * C + (A & M) * C -> (A & (N + M)) & C
3670-
// This also accepts the equivalent select form of (A & N) * C
3671-
// expressions i.e. !(A & N) ? 0 : N * C)
3668+
/// (A & N) * C + (A & M) * C -> (A & (N + M)) & C
3669+
/// This also accepts the equivalent select form of (A & N) * C
3670+
/// expressions i.e. !(A & N) ? 0 : N * C)
36723671
static Value *foldBitmaskMul(Value *Op0, Value *Op1,
36733672
InstCombiner::BuilderTy &Builder) {
36743673
auto Decomp1 = matchBitmaskMul(Op1);
@@ -3696,57 +3695,39 @@ static Value *foldBitmaskMul(Value *Op0, Value *Op1,
36963695
return nullptr;
36973696
}
36983697

3699-
Value *InstCombinerImpl::foldDisjointOr(Value *LHS, Value *RHS,
3700-
Instruction &I) {
3698+
Value *InstCombinerImpl::foldDisjointOr(Value *LHS, Value *RHS) {
37013699
if (Value *Res = foldBitmaskMul(LHS, RHS, Builder)) {
37023700
return Res;
37033701
}
37043702

37053703
return nullptr;
37063704
}
37073705

3708-
Value *InstCombinerImpl::reassociateDisjointOr(Value *LHS, Value *RHS,
3709-
Instruction &I) {
3706+
Value *InstCombinerImpl::reassociateDisjointOr(Value *LHS, Value *RHS) {
37103707

37113708
Value *X, *Y;
37123709
if (match(RHS, m_OneUse(m_DisjointOr(m_Value(X), m_Value(Y))))) {
3713-
if (Value *Res = foldDisjointOr(LHS, X, I)) {
3714-
auto Disjoint = cast<PossiblyDisjointInst>(Builder.CreateOr(Res, Y));
3715-
Disjoint->setIsDisjoint(true);
3716-
return cast<Value>(Disjoint);
3717-
}
3718-
if (Value *Res = foldDisjointOr(LHS, Y, I)) {
3719-
auto Disjoint = cast<PossiblyDisjointInst>(Builder.CreateOr(Res, X));
3720-
Disjoint->setIsDisjoint(true);
3721-
return cast<Value>(Disjoint);
3722-
}
3710+
if (Value *Res = foldDisjointOr(LHS, X))
3711+
return Builder.CreateOr(Res, Y, "", /*IsDisjoint=*/true);
3712+
if (Value *Res = foldDisjointOr(LHS, Y))
3713+
return Builder.CreateOr(Res, X, "", /*IsDisjoint=*/true);
37233714
}
37243715

37253716
if (match(LHS, m_OneUse(m_DisjointOr(m_Value(X), m_Value(Y))))) {
3726-
if (Value *Res = foldDisjointOr(X, RHS, I)) {
3727-
auto Disjoint = cast<PossiblyDisjointInst>(Builder.CreateOr(Res, Y));
3728-
Disjoint->setIsDisjoint(true);
3729-
return cast<Value>(Disjoint);
3730-
}
3731-
if (Value *Res = foldDisjointOr(Y, RHS, I)) {
3732-
auto Disjoint = cast<PossiblyDisjointInst>(Builder.CreateOr(Res, X));
3733-
Disjoint->setIsDisjoint(true);
3734-
return cast<Value>(Disjoint);
3735-
}
3717+
if (Value *Res = foldDisjointOr(X, RHS))
3718+
return Builder.CreateOr(Res, Y, "", /*IsDisjoint=*/true);
3719+
if (Value *Res = foldDisjointOr(Y, RHS))
3720+
return Builder.CreateOr(Res, X, "", /*IsDisjoint=*/true);
37363721
}
37373722

37383723
Value *X1, *Y1;
37393724
if (match(LHS, m_OneUse(m_DisjointOr(m_Value(X), m_Value(Y)))) &&
37403725
(match(RHS, m_OneUse(m_DisjointOr(m_Value(X1), m_Value(Y1)))))) {
3741-
auto TryFold = [this, &I](Value *Op0, Value *Op1, Value *Rem0,
3742-
Value *Rem1) -> Value * {
3743-
if (Value *Res = foldDisjointOr(Op0, Op1, I)) {
3744-
auto Disjoint =
3745-
cast<PossiblyDisjointInst>(Builder.CreateOr(Rem0, Rem1));
3746-
Disjoint->setIsDisjoint(true);
3747-
auto Disjoint2 =
3748-
cast<PossiblyDisjointInst>(Builder.CreateOr(Disjoint, Res));
3749-
return cast<Value>(Disjoint2);
3726+
auto TryFold = [this](Value *Op0, Value *Op1, Value *Rem0,
3727+
Value *Rem1) -> Value * {
3728+
if (Value *Res = foldDisjointOr(Op0, Op1)) {
3729+
auto Disjoint = Builder.CreateOr(Rem0, Rem1, "", /*IsDisjoint=*/true);
3730+
return Builder.CreateOr(Disjoint, Res, "", /*IsDisjoint=*/true);
37503731
}
37513732
return nullptr;
37523733
};
@@ -3851,7 +3832,7 @@ Instruction *InstCombinerImpl::visitOr(BinaryOperator &I) {
38513832
if (Value *Res = foldBitmaskMul(I.getOperand(0), I.getOperand(1), Builder))
38523833
return replaceInstUsesWith(I, Res);
38533834

3854-
if (Value *Res = reassociateDisjointOr(I.getOperand(0), I.getOperand(1), I))
3835+
if (Value *Res = reassociateDisjointOr(I.getOperand(0), I.getOperand(1)))
38553836
return replaceInstUsesWith(I, Res);
38563837
}
38573838

‎llvm/lib/Transforms/InstCombine/InstCombineInternal.h‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -439,9 +439,9 @@ class LLVM_LIBRARY_VISIBILITY InstCombinerImpl final
439439
Value *reassociateBooleanAndOr(Value *LHS, Value *X, Value *Y, Instruction &I,
440440
bool IsAnd, bool RHSIsLogical);
441441

442-
Value *foldDisjointOr(Value *LHS, Value *RHS, Instruction &I);
442+
Value *foldDisjointOr(Value *LHS, Value *RHS);
443443

444-
Value *reassociateDisjointOr(Value *LHS, Value *RHS, Instruction &I);
444+
Value *reassociateDisjointOr(Value *LHS, Value *RHS);
445445

446446
Instruction *
447447
canonicalizeConditionalNegationViaMathToSelect(BinaryOperator &i);

‎llvm/test/Transforms/InstCombine/or-bitmask.ll‎

Lines changed: 53 additions & 53 deletions
Original file line numberDiff line numberDiff line change
@@ -458,10 +458,10 @@ define i32 @unrelated_ops(i32 %in, i32 %in2) {
458458
; CHECK-NEXT: [[OUT:%.*]] = or disjoint i32 [[TMP2]], [[IN2:%.*]]
459459
; CHECK-NEXT: ret i32 [[OUT]]
460460
;
461-
%1 = and i32 %in, 3
462-
%temp = mul nuw nsw i32 %1, 72
463-
%2 = and i32 %in, 12
464-
%temp2 = mul nuw nsw i32 %2, 72
461+
%and0 = and i32 %in, 3
462+
%temp = mul nuw nsw i32 %and0, 72
463+
%and1 = and i32 %in, 12
464+
%temp2 = mul nuw nsw i32 %and1, 72
465465
%temp3 = or disjoint i32 %in2, %temp2
466466
%out = or disjoint i32 %temp, %temp3
467467
ret i32 %out
@@ -474,10 +474,10 @@ define i32 @unrelated_ops1(i32 %in, i32 %in2) {
474474
; CHECK-NEXT: [[OUT:%.*]] = or disjoint i32 [[TMP2]], [[IN2:%.*]]
475475
; CHECK-NEXT: ret i32 [[OUT]]
476476
;
477-
%1 = and i32 %in, 3
478-
%temp = mul nuw nsw i32 %1, 72
479-
%2 = and i32 %in, 12
480-
%temp2 = mul nuw nsw i32 %2, 72
477+
%and0 = and i32 %in, 3
478+
%temp = mul nuw nsw i32 %and0, 72
479+
%and1 = and i32 %in, 12
480+
%temp2 = mul nuw nsw i32 %and1, 72
481481
%temp3 = or disjoint i32 %in2, %temp
482482
%out = or disjoint i32 %temp3, %temp2
483483
ret i32 %out
@@ -488,14 +488,14 @@ define i32 @unrelated_ops2(i32 %in, i32 %in2, i32 %in3) {
488488
; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[IN:%.*]], 15
489489
; CHECK-NEXT: [[TMP2:%.*]] = mul nuw nsw i32 [[TMP1]], 72
490490
; CHECK-NEXT: [[TMP3:%.*]] = or disjoint i32 [[IN3:%.*]], [[IN2:%.*]]
491-
; CHECK-NEXT: [[OUT:%.*]] = or i32 [[TMP3]], [[TMP2]]
491+
; CHECK-NEXT: [[OUT:%.*]] = or disjoint i32 [[TMP3]], [[TMP2]]
492492
; CHECK-NEXT: ret i32 [[OUT]]
493493
;
494-
%1 = and i32 %in, 3
495-
%temp = mul nuw nsw i32 %1, 72
494+
%and0 = and i32 %in, 3
495+
%temp = mul nuw nsw i32 %and0, 72
496496
%temp3 = or disjoint i32 %temp, %in3
497-
%2 = and i32 %in, 12
498-
%temp2 = mul nuw nsw i32 %2, 72
497+
%and1 = and i32 %in, 12
498+
%temp2 = mul nuw nsw i32 %and1, 72
499499
%temp4 = or disjoint i32 %in2, %temp2
500500
%out = or disjoint i32 %temp3, %temp4
501501
ret i32 %out
@@ -506,15 +506,15 @@ define i32 @unrelated_ops3(i32 %in, i32 %in2, i32 %in3) {
506506
; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[IN:%.*]], 14
507507
; CHECK-NEXT: [[TEMP2:%.*]] = mul nuw nsw i32 [[TMP2]], 72
508508
; CHECK-NEXT: [[TMP3:%.*]] = or disjoint i32 [[IN3:%.*]], [[IN2:%.*]]
509-
; CHECK-NEXT: [[OUT:%.*]] = or i32 [[TMP3]], [[TEMP2]]
509+
; CHECK-NEXT: [[OUT:%.*]] = or disjoint i32 [[TMP3]], [[TEMP2]]
510510
; CHECK-NEXT: ret i32 [[OUT]]
511511
;
512-
%1 = and i32 %in, 2
513-
%cmp = icmp eq i32 %1, 0
512+
%and0 = and i32 %in, 2
513+
%cmp = icmp eq i32 %and0, 0
514514
%temp = select i1 %cmp, i32 0, i32 144
515515
%temp3 = or disjoint i32 %temp, %in3
516-
%2 = and i32 %in, 12
517-
%temp2 = mul nuw nsw i32 %2, 72
516+
%and1 = and i32 %in, 12
517+
%temp2 = mul nuw nsw i32 %and1, 72
518518
%temp4 = or disjoint i32 %in2, %temp2
519519
%out = or disjoint i32 %temp3, %temp4
520520
ret i32 %out
@@ -525,14 +525,14 @@ define i32 @unrelated_ops4(i32 %in, i32 %in2, i32 %in3) {
525525
; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[IN:%.*]], 14
526526
; CHECK-NEXT: [[TMP3:%.*]] = mul nuw nsw i32 [[TMP2]], 72
527527
; CHECK-NEXT: [[TMP4:%.*]] = or disjoint i32 [[IN3:%.*]], [[IN2:%.*]]
528-
; CHECK-NEXT: [[OUT:%.*]] = or i32 [[TMP4]], [[TMP3]]
528+
; CHECK-NEXT: [[OUT:%.*]] = or disjoint i32 [[TMP4]], [[TMP3]]
529529
; CHECK-NEXT: ret i32 [[OUT]]
530530
;
531-
%1 = and i32 %in, 12
532-
%temp = mul nuw nsw i32 %1, 72
531+
%and0 = and i32 %in, 12
532+
%temp = mul nuw nsw i32 %and0, 72
533533
%temp3 = or disjoint i32 %in2, %temp
534-
%2 = and i32 %in, 2
535-
%cmp = icmp eq i32 %2, 0
534+
%and1 = and i32 %in, 2
535+
%cmp = icmp eq i32 %and1, 0
536536
%temp2 = select i1 %cmp, i32 0, i32 144
537537
%temp4 = or disjoint i32 %temp2, %in3
538538
%out = or disjoint i32 %temp3, %temp4
@@ -544,15 +544,15 @@ define i32 @unrelated_ops5(i32 %in, i32 %in2, i32 %in3) {
544544
; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[IN:%.*]], 6
545545
; CHECK-NEXT: [[TMP3:%.*]] = mul nuw nsw i32 [[TMP2]], 72
546546
; CHECK-NEXT: [[TMP4:%.*]] = or disjoint i32 [[IN3:%.*]], [[IN2:%.*]]
547-
; CHECK-NEXT: [[OUT:%.*]] = or i32 [[TMP4]], [[TMP3]]
547+
; CHECK-NEXT: [[OUT:%.*]] = or disjoint i32 [[TMP4]], [[TMP3]]
548548
; CHECK-NEXT: ret i32 [[OUT]]
549549
;
550-
%1 = and i32 %in, 2
551-
%cmp = icmp eq i32 %1, 0
550+
%and0 = and i32 %in, 2
551+
%cmp = icmp eq i32 %and0, 0
552552
%temp = select i1 %cmp, i32 0, i32 144
553553
%temp3 = or disjoint i32 %temp, %in3
554-
%2 = and i32 %in, 4
555-
%cmp2 = icmp eq i32 %2, 0
554+
%and1 = and i32 %in, 4
555+
%cmp2 = icmp eq i32 %and1, 0
556556
%temp2 = select i1 %cmp2, i32 0, i32 288
557557
%temp4 = or disjoint i32 %in2, %temp2
558558
%out = or disjoint i32 %temp3, %temp4
@@ -564,14 +564,14 @@ define i32 @unrelated_ops6(i32 %in, i32 %in2, i32 %in3) {
564564
; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[IN:%.*]], 15
565565
; CHECK-NEXT: [[TMP2:%.*]] = mul nuw nsw i32 [[TMP1]], 72
566566
; CHECK-NEXT: [[TMP3:%.*]] = or disjoint i32 [[IN3:%.*]], [[IN2:%.*]]
567-
; CHECK-NEXT: [[OUT:%.*]] = or i32 [[TMP3]], [[TMP2]]
567+
; CHECK-NEXT: [[OUT:%.*]] = or disjoint i32 [[TMP3]], [[TMP2]]
568568
; CHECK-NEXT: ret i32 [[OUT]]
569569
;
570-
%1 = and i32 %in, 3
571-
%temp = mul nuw nsw i32 %1, 72
570+
%and0 = and i32 %in, 3
571+
%temp = mul nuw nsw i32 %and0, 72
572572
%temp3 = or disjoint i32 %in3, %temp
573-
%2 = and i32 %in, 12
574-
%temp2 = mul nuw nsw i32 %2, 72
573+
%and1 = and i32 %in, 12
574+
%temp2 = mul nuw nsw i32 %and1, 72
575575
%temp4 = or disjoint i32 %in2, %temp2
576576
%out = or disjoint i32 %temp3, %temp4
577577
ret i32 %out
@@ -582,14 +582,14 @@ define i32 @unrelated_ops7(i32 %in, i32 %in2, i32 %in3) {
582582
; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[IN:%.*]], 15
583583
; CHECK-NEXT: [[TMP2:%.*]] = mul nuw nsw i32 [[TMP1]], 72
584584
; CHECK-NEXT: [[TMP3:%.*]] = or disjoint i32 [[IN3:%.*]], [[IN2:%.*]]
585-
; CHECK-NEXT: [[OUT:%.*]] = or i32 [[TMP3]], [[TMP2]]
585+
; CHECK-NEXT: [[OUT:%.*]] = or disjoint i32 [[TMP3]], [[TMP2]]
586586
; CHECK-NEXT: ret i32 [[OUT]]
587587
;
588-
%1 = and i32 %in, 3
589-
%temp = mul nuw nsw i32 %1, 72
588+
%and0 = and i32 %in, 3
589+
%temp = mul nuw nsw i32 %and0, 72
590590
%temp3 = or disjoint i32 %in3, %temp
591-
%2 = and i32 %in, 12
592-
%temp2 = mul nuw nsw i32 %2, 72
591+
%and1 = and i32 %in, 12
592+
%temp2 = mul nuw nsw i32 %and1, 72
593593
%temp4 = or disjoint i32 %temp2, %in2
594594
%out = or disjoint i32 %temp3, %temp4
595595
ret i32 %out
@@ -600,14 +600,14 @@ define i32 @unrelated_ops8(i32 %in, i32 %in2, i32 %in3) {
600600
; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[IN:%.*]], 15
601601
; CHECK-NEXT: [[TMP2:%.*]] = mul nuw nsw i32 [[TMP1]], 72
602602
; CHECK-NEXT: [[TMP3:%.*]] = or disjoint i32 [[IN3:%.*]], [[IN2:%.*]]
603-
; CHECK-NEXT: [[OUT:%.*]] = or i32 [[TMP3]], [[TMP2]]
603+
; CHECK-NEXT: [[OUT:%.*]] = or disjoint i32 [[TMP3]], [[TMP2]]
604604
; CHECK-NEXT: ret i32 [[OUT]]
605605
;
606-
%1 = and i32 %in, 3
607-
%temp = mul nuw nsw i32 %1, 72
606+
%and0 = and i32 %in, 3
607+
%temp = mul nuw nsw i32 %and0, 72
608608
%temp3 = or disjoint i32 %temp, %in3
609-
%2 = and i32 %in, 12
610-
%temp2 = mul nuw nsw i32 %2, 72
609+
%and1 = and i32 %in, 12
610+
%temp2 = mul nuw nsw i32 %and1, 72
611611
%temp4 = or disjoint i32 %temp2, %in2
612612
%out = or disjoint i32 %temp3, %temp4
613613
ret i32 %out
@@ -624,11 +624,11 @@ define i32 @unrelated_ops_nocombine(i32 %in, i32 %in2, i32 %in3) {
624624
; CHECK-NEXT: [[OUT:%.*]] = or disjoint i32 [[TMP4]], [[TMP3]]
625625
; CHECK-NEXT: ret i32 [[OUT]]
626626
;
627-
%1 = and i32 %in, 3
628-
%temp = mul nuw nsw i32 %1, 72
627+
%and0 = and i32 %in, 3
628+
%temp = mul nuw nsw i32 %and0, 72
629629
%temp3 = or disjoint i32 %temp, %in3
630-
%2 = and i32 %in, 7
631-
%temp2 = mul nuw nsw i32 %2, 72
630+
%and1 = and i32 %in, 7
631+
%temp2 = mul nuw nsw i32 %and1, 72
632632
%temp4 = or disjoint i32 %in2, %temp2
633633
%out = or disjoint i32 %temp3, %temp4
634634
ret i32 %out
@@ -645,11 +645,11 @@ define i32 @unrelated_ops_nocombine1(i32 %in, i32 %in2, i32 %in3) {
645645
; CHECK-NEXT: [[OUT:%.*]] = or disjoint i32 [[TMP4]], [[TMP3]]
646646
; CHECK-NEXT: ret i32 [[OUT]]
647647
;
648-
%1 = and i32 %in, 3
649-
%temp = mul nuw nsw i32 %1, 72
648+
%and0 = and i32 %in, 3
649+
%temp = mul nuw nsw i32 %and0, 72
650650
%temp3 = or disjoint i32 %temp, %in3
651-
%2 = and i32 %in, 12
652-
%temp2 = mul nuw nsw i32 %2, 36
651+
%and1 = and i32 %in, 12
652+
%temp2 = mul nuw nsw i32 %and1, 36
653653
%temp4 = or disjoint i32 %in2, %temp2
654654
%out = or disjoint i32 %temp3, %temp4
655655
ret i32 %out
@@ -663,8 +663,8 @@ define i32 @no_chain(i32 %in, i32 %in2, i32 %in3) {
663663
; CHECK-NEXT: [[OUT:%.*]] = or disjoint i32 [[TEMP3]], [[IN2:%.*]]
664664
; CHECK-NEXT: ret i32 [[OUT]]
665665
;
666-
%1 = and i32 %in, 3
667-
%temp = mul nuw nsw i32 %1, 72
666+
%and0 = and i32 %in, 3
667+
%temp = mul nuw nsw i32 %and0, 72
668668
%temp3 = or disjoint i32 %temp, %in3
669669
%out = or disjoint i32 %temp3, %in2
670670
ret i32 %out

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