llvm-reduce: Add values to return reduction

In void functions, try to replace instruction uses
with a new non-void return. If the return type matches
the instruction, also try to directly return it.

This handles most of the cases, but doesn't try to handle
all of the weird exception related terminators.

Also doesn't try to replace argument uses, although it could. We
could also handle cases where we can insert a simple cast to an
original return value. I didn't think too hard about where to put this
in the default pass order. In many cases it obviates the need for most
of the CFG folds, but I've left it near the end initially.

I also think this is too aggressive about removing dead code, and
should leave existing dead code alone. I'm also not sure why we have
both "removeUnreachableBlocks" and EliminateUnreachableBlocks" in Utils.

Fixes #66039, fixes #107327

Author: arsenm

llvm/include/llvm/IR/Function.h

@@ -1048,6 +1048,14 @@ class LLVM_ABI Function : public GlobalObject, public ilist_node<Function> {
   void setValueSubclassDataBit(unsigned Bit, bool On);
 };
 
+namespace CallingConv {
+
+// TODO: Need similar function for support of argument in position. General
+// version on FunctionType + Attributes + CallingConv::ID?
+LLVM_READNONE
+bool supportsNonVoidReturnType(CallingConv::ID CC);
+} // namespace CallingConv
+
 /// Check whether null pointer dereferencing is considered undefined behavior
 /// for a given function or an address space.
 /// Null pointer access in non-zero address space is not considered undefined.

llvm/lib/IR/Function.cpp

@@ -1177,3 +1177,85 @@ bool llvm::NullPointerIsDefined(const Function *F, unsigned AS) {
 
   return false;
 }
+
+bool llvm::CallingConv::supportsNonVoidReturnType(CallingConv::ID CC) {
+  switch (CC) {
+  case CallingConv::C:
+  case CallingConv::Fast:
+  case CallingConv::Cold:
+  case CallingConv::GHC:
+  case CallingConv::HiPE:
+  case CallingConv::AnyReg:
+  case CallingConv::PreserveMost:
+  case CallingConv::PreserveAll:
+  case CallingConv::Swift:
+  case CallingConv::CXX_FAST_TLS:
+  case CallingConv::Tail:
+  case CallingConv::CFGuard_Check:
+  case CallingConv::SwiftTail:
+  case CallingConv::PreserveNone:
+  case CallingConv::X86_StdCall:
+  case CallingConv::X86_FastCall:
+  case CallingConv::ARM_APCS:
+  case CallingConv::ARM_AAPCS:
+  case CallingConv::ARM_AAPCS_VFP:
+  case CallingConv::MSP430_INTR:
+  case CallingConv::X86_ThisCall:
+  case CallingConv::PTX_Device:
+  case CallingConv::SPIR_FUNC:
+  case CallingConv::Intel_OCL_BI:
+  case CallingConv::X86_64_SysV:
+  case CallingConv::Win64:
+  case CallingConv::X86_VectorCall:
+  case CallingConv::DUMMY_HHVM:
+  case CallingConv::DUMMY_HHVM_C:
+  case CallingConv::X86_INTR:
+  case CallingConv::AVR_INTR:
+  case CallingConv::AVR_SIGNAL:
+  case CallingConv::AVR_BUILTIN:
+    return true;
+  case CallingConv::AMDGPU_KERNEL:
+  case CallingConv::SPIR_KERNEL:
+  case CallingConv::AMDGPU_CS_Chain:
+  case CallingConv::AMDGPU_CS_ChainPreserve:
+    return false;
+  case CallingConv::AMDGPU_VS:
+  case CallingConv::AMDGPU_HS:
+  case CallingConv::AMDGPU_GS:
+  case CallingConv::AMDGPU_PS:
+  case CallingConv::AMDGPU_CS:
+  case CallingConv::AMDGPU_LS:
+  case CallingConv::AMDGPU_ES:
+  case CallingConv::MSP430_BUILTIN:
+  case CallingConv::AArch64_VectorCall:
+  case CallingConv::AArch64_SVE_VectorCall:
+  case CallingConv::WASM_EmscriptenInvoke:
+  case CallingConv::AMDGPU_Gfx:
+  case CallingConv::M68k_INTR:
+  case CallingConv::AArch64_SME_ABI_Support_Routines_PreserveMost_From_X0:
+  case CallingConv::AArch64_SME_ABI_Support_Routines_PreserveMost_From_X2:
+  case CallingConv::M68k_RTD:
+  case CallingConv::GRAAL:
+  case CallingConv::ARM64EC_Thunk_X64:
+  case CallingConv::ARM64EC_Thunk_Native:
+  case CallingConv::RISCV_VectorCall:
+  case CallingConv::AArch64_SME_ABI_Support_Routines_PreserveMost_From_X1:
+  case CallingConv::RISCV_VLSCall_32:
+  case CallingConv::RISCV_VLSCall_64:
+  case CallingConv::RISCV_VLSCall_128:
+  case CallingConv::RISCV_VLSCall_256:
+  case CallingConv::RISCV_VLSCall_512:
+  case CallingConv::RISCV_VLSCall_1024:
+  case CallingConv::RISCV_VLSCall_2048:
+  case CallingConv::RISCV_VLSCall_4096:
+  case CallingConv::RISCV_VLSCall_8192:
+  case CallingConv::RISCV_VLSCall_16384:
+  case CallingConv::RISCV_VLSCall_32768:
+  case CallingConv::RISCV_VLSCall_65536:
+    return true;
+  default:
+    return false;
+  }
+
+  llvm_unreachable("covered callingconv switch");
+}

llvm/test/tools/llvm-reduce/reduce-operands-fp.ll

@@ -27,7 +27,7 @@
 ; CHECK-INTERESTINGNESS: = fadd <2 x float>
 ; CHECK-INTERESTINGNESS: = fadd <2 x float>
 
-; CHECK-LABEL: define void @foo(
+; CHECK-LABEL: define {{(void|<2 x float>)}} @foo(
 
 
 ; ONE: %fadd0 = fadd float %arg0, 1.000000e+00

llvm/test/tools/llvm-reduce/reduce-operands-int.ll

@@ -22,7 +22,7 @@
 ; CHECK-INTERESTINGNESS: = add <2 x i32>
 ; CHECK-INTERESTINGNESS: = add <2 x i32>
 
-; CHECK-LABEL: define void @foo(
+; CHECK-LABEL: define {{(void|<2 x i32>)}} @foo(
 
 
 ; ONE: %add0 = add i32 %arg0, 1

llvm/test/tools/llvm-reduce/reduce-operands-ptr.ll

@@ -8,7 +8,7 @@
 ; RUN: llvm-reduce --abort-on-invalid-reduction --test FileCheck --test-arg --check-prefixes=CHECK-INTERESTINGNESS --test-arg %s --test-arg --input-file %s -o %t
 ; RUN: FileCheck --check-prefixes=CHECK,ZERO %s < %t
 
-; CHECK-LABEL: define void @foo(
+; CHECK-LABEL: define {{(void|ptr)}} @foo(
 
 ; ONE: load i32, ptr %a0
 ; ONE: load i32, ptr @g