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[AMDGPU][test] Remove unsafe-fp-math uses (NFC) (#164609)
Post cleanup for #164534.
1 parent 1d9f9ad commit c2b2a34

14 files changed

+27
-32
lines changed

‎llvm/test/CodeGen/AMDGPU/combine_andor_with_cmps.ll‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3385,7 +3385,7 @@ declare half @llvm.canonicalize.f16(half)
33853385
declare <2 x half> @llvm.canonicalize.v2f16(<2 x half>)
33863386

33873387
attributes #0 = { nounwind "amdgpu-ieee"="false" }
3388-
attributes #1 = { nounwind "unsafe-fp-math"="true" "no-nans-fp-math"="true" }
3388+
attributes #1 = { nounwind "no-nans-fp-math"="true" }
33893389
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
33903390
; GFX11NONANS-FAKE16: {{.*}}
33913391
; GFX11NONANS-TRUE16: {{.*}}

‎llvm/test/CodeGen/AMDGPU/fdiv.f64.ll‎

Lines changed: 3 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -127,7 +127,7 @@ define amdgpu_kernel void @s_fdiv_v4f64(ptr addrspace(1) %out, <4 x double> %num
127127
; GCN-LABEL: {{^}}div_fast_2_x_pat_f64:
128128
; GCN: v_mul_f64 [[MUL:v\[[0-9]+:[0-9]+\]]], s{{\[[0-9]+:[0-9]+\]}}, 0.5
129129
; GCN: buffer_store_dwordx2 [[MUL]]
130-
define amdgpu_kernel void @div_fast_2_x_pat_f64(ptr addrspace(1) %out) #1 {
130+
define amdgpu_kernel void @div_fast_2_x_pat_f64(ptr addrspace(1) %out) #0 {
131131
%x = load double, ptr addrspace(1) poison
132132
%rcp = fdiv fast double %x, 2.0
133133
store double %rcp, ptr addrspace(1) %out, align 4
@@ -139,7 +139,7 @@ define amdgpu_kernel void @div_fast_2_x_pat_f64(ptr addrspace(1) %out) #1 {
139139
; GCN-DAG: v_mov_b32_e32 v[[K_HI:[0-9]+]], 0x3fb99999
140140
; GCN: v_mul_f64 [[MUL:v\[[0-9]+:[0-9]+\]]], s{{\[[0-9]+:[0-9]+\]}}, v[[[K_LO]]:[[K_HI]]]
141141
; GCN: buffer_store_dwordx2 [[MUL]]
142-
define amdgpu_kernel void @div_fast_k_x_pat_f64(ptr addrspace(1) %out) #1 {
142+
define amdgpu_kernel void @div_fast_k_x_pat_f64(ptr addrspace(1) %out) #0 {
143143
%x = load double, ptr addrspace(1) poison
144144
%rcp = fdiv fast double %x, 10.0
145145
store double %rcp, ptr addrspace(1) %out, align 4
@@ -151,12 +151,11 @@ define amdgpu_kernel void @div_fast_k_x_pat_f64(ptr addrspace(1) %out) #1 {
151151
; GCN-DAG: v_mov_b32_e32 v[[K_HI:[0-9]+]], 0xbfb99999
152152
; GCN: v_mul_f64 [[MUL:v\[[0-9]+:[0-9]+\]]], s{{\[[0-9]+:[0-9]+\]}}, v[[[K_LO]]:[[K_HI]]]
153153
; GCN: buffer_store_dwordx2 [[MUL]]
154-
define amdgpu_kernel void @div_fast_neg_k_x_pat_f64(ptr addrspace(1) %out) #1 {
154+
define amdgpu_kernel void @div_fast_neg_k_x_pat_f64(ptr addrspace(1) %out) #0 {
155155
%x = load double, ptr addrspace(1) poison
156156
%rcp = fdiv fast double %x, -10.0
157157
store double %rcp, ptr addrspace(1) %out, align 4
158158
ret void
159159
}
160160

161161
attributes #0 = { nounwind }
162-
attributes #1 = { nounwind "unsafe-fp-math"="true" }

‎llvm/test/CodeGen/AMDGPU/fmad-formation-fmul-distribute-denormal-mode.ll‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -284,4 +284,4 @@ define <2 x float> @unsafe_fast_fmul_fsub_ditribute_post_legalize(float %arg0, <
284284
ret <2 x float> %tmp1
285285
}
286286

287-
attributes #0 = { "no-infs-fp-math"="true" "unsafe-fp-math"="true" }
287+
attributes #0 = { "no-infs-fp-math"="true" }

‎llvm/test/CodeGen/AMDGPU/fmed3.bf16.ll‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -219,8 +219,8 @@ define <2 x bfloat> @v_test_fmed3_r_i_i_v2bf16_minimumnum_maximumnum(<2 x bfloat
219219
}
220220

221221
attributes #0 = { nounwind readnone }
222-
attributes #1 = { nounwind "unsafe-fp-math"="false" "no-nans-fp-math"="false" }
223-
attributes #2 = { nounwind "unsafe-fp-math"="false" "no-nans-fp-math"="true" }
222+
attributes #1 = { nounwind "no-nans-fp-math"="false" }
223+
attributes #2 = { nounwind "no-nans-fp-math"="true" }
224224
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
225225
; GFX11: {{.*}}
226226
; GFX11-SDAG: {{.*}}

‎llvm/test/CodeGen/AMDGPU/fmed3.ll‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -8905,4 +8905,4 @@ declare half @llvm.minnum.f16(half, half) #0
89058905
declare half @llvm.maxnum.f16(half, half) #0
89068906

89078907
attributes #0 = { nounwind readnone }
8908-
attributes #2 = { nounwind "unsafe-fp-math"="false" "no-nans-fp-math"="true" }
8908+
attributes #2 = { nounwind "no-nans-fp-math"="true" }

‎llvm/test/CodeGen/AMDGPU/fneg-combines.legal.f16.ll‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -159,7 +159,7 @@ declare half @llvm.amdgcn.interp.p2.f16(float, float, i32, i32, i1, i32) #0
159159

160160
attributes #0 = { nounwind "denormal-fp-math-f32"="preserve-sign,preserve-sign" }
161161
attributes #1 = { nounwind readnone }
162-
attributes #2 = { nounwind "unsafe-fp-math"="true" }
162+
attributes #2 = { nounwind }
163163
attributes #3 = { nounwind "no-signed-zeros-fp-math"="true" }
164164
attributes #4 = { nounwind "amdgpu-ieee"="false" "denormal-fp-math-f32"="preserve-sign,preserve-sign" }
165165
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:

‎llvm/test/CodeGen/AMDGPU/fneg-combines.ll‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -8006,7 +8006,7 @@ declare float @llvm.amdgcn.interp.p2(float, float, i32, i32, i32) #0
80068006

80078007
attributes #0 = { nounwind "denormal-fp-math-f32"="preserve-sign,preserve-sign" }
80088008
attributes #1 = { nounwind readnone }
8009-
attributes #2 = { nounwind "unsafe-fp-math"="true" }
8009+
attributes #2 = { nounwind }
80108010
attributes #3 = { nounwind "no-signed-zeros-fp-math"="true" }
80118011
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
80128012
; GCN-NSZ: {{.*}}

‎llvm/test/CodeGen/AMDGPU/frem.ll‎

Lines changed: 4 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -2048,7 +2048,7 @@ define amdgpu_kernel void @unsafe_frem_f16(ptr addrspace(1) %out, ptr addrspace(
20482048
; GFX1200-FAKE16-NEXT: v_fmac_f16_e32 v1, v3, v2
20492049
; GFX1200-FAKE16-NEXT: global_store_b16 v0, v1, s[0:1]
20502050
; GFX1200-FAKE16-NEXT: s_endpgm
2051-
ptr addrspace(1) %in2) #1 {
2051+
ptr addrspace(1) %in2) #0 {
20522052
%gep2 = getelementptr half, ptr addrspace(1) %in2, i32 4
20532053
%r0 = load half, ptr addrspace(1) %in1, align 4
20542054
%r1 = load half, ptr addrspace(1) %gep2, align 4
@@ -3417,7 +3417,7 @@ define amdgpu_kernel void @unsafe_frem_f32(ptr addrspace(1) %out, ptr addrspace(
34173417
; GFX1200-NEXT: v_fmac_f32_e32 v1, v3, v2
34183418
; GFX1200-NEXT: global_store_b32 v0, v1, s[0:1]
34193419
; GFX1200-NEXT: s_endpgm
3420-
ptr addrspace(1) %in2) #1 {
3420+
ptr addrspace(1) %in2) #0 {
34213421
%gep2 = getelementptr float, ptr addrspace(1) %in2, i32 4
34223422
%r0 = load float, ptr addrspace(1) %in1, align 4
34233423
%r1 = load float, ptr addrspace(1) %gep2, align 4
@@ -4821,7 +4821,7 @@ define amdgpu_kernel void @unsafe_frem_f64(ptr addrspace(1) %out, ptr addrspace(
48214821
; GFX1200-NEXT: v_fma_f64 v[0:1], -v[4:5], v[2:3], v[0:1]
48224822
; GFX1200-NEXT: global_store_b64 v12, v[0:1], s[0:1]
48234823
; GFX1200-NEXT: s_endpgm
4824-
ptr addrspace(1) %in2) #1 {
4824+
ptr addrspace(1) %in2) #0 {
48254825
%r0 = load double, ptr addrspace(1) %in1, align 8
48264826
%r1 = load double, ptr addrspace(1) %in2, align 8
48274827
%r2 = frem afn double %r0, %r1
@@ -18918,7 +18918,4 @@ define amdgpu_kernel void @frem_v2f64_const(ptr addrspace(1) %out) #0 {
1891818918

1891918919

1892018920

18921-
attributes #0 = { nounwind "unsafe-fp-math"="false" "denormal-fp-math-f32"="preserve-sign,preserve-sign" }
18922-
attributes #1 = { nounwind "unsafe-fp-math"="true" "denormal-fp-math-f32"="preserve-sign,preserve-sign" }
18923-
18924-
18921+
attributes #0 = { nounwind "denormal-fp-math-f32"="preserve-sign,preserve-sign" }

‎llvm/test/CodeGen/AMDGPU/fsqrt.f64.ll‎

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2870,7 +2870,7 @@ define double @v_sqrt_f64__enough_unsafe_attrs(double %x) #3 {
28702870
ret double %result
28712871
}
28722872

2873-
define double @v_sqrt_f64__unsafe_attr(double %x) #4 {
2873+
define double @v_sqrt_f64__unsafe_attr(double %x) {
28742874
; GFX6-SDAG-LABEL: v_sqrt_f64__unsafe_attr:
28752875
; GFX6-SDAG: ; %bb.0:
28762876
; GFX6-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -3449,7 +3449,6 @@ declare i32 @llvm.amdgcn.readfirstlane(i32) #1
34493449
attributes #0 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
34503450
attributes #1 = { convergent nounwind willreturn memory(none) }
34513451
attributes #3 = { "no-nans-fp-math"="true" "no-infs-fp-math"="true" }
3452-
attributes #4 = { "unsafe-fp-math"="true" }
34533452
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
34543453
; GFX6: {{.*}}
34553454
; GFX8: {{.*}}

‎llvm/test/CodeGen/AMDGPU/fsqrt.r600.ll‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -239,4 +239,4 @@ declare <2 x float> @llvm.sqrt.v2f32(<2 x float> %in) #0
239239
declare <4 x float> @llvm.sqrt.v4f32(<4 x float> %in) #0
240240

241241
attributes #0 = { nounwind readnone }
242-
attributes #1 = { nounwind "unsafe-fp-math"="true" }
242+
attributes #1 = { nounwind }

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