Skip to content

Commit c35df91

Browse files
Wolfram70Wolfram70
committed
fix error messages and use get methods for type names
1 parent 1837100 commit c35df91

File tree

2 files changed

+47
-26
lines changed

2 files changed

+47
-26
lines changed

‎mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp‎

Lines changed: 31 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -191,8 +191,10 @@ LogicalResult ConvertFloatToTF32Op::verify() {
191191

192192
LogicalResult ConvertF32x2ToF6x2Op::verify() {
193193
if (!llvm::isa<mlir::Float6E2M3FNType, mlir::Float6E3M2FNType>(getDstTy())) {
194-
return emitError("Only f6E2M3FN and f6E3M2FN types are supported for "
195-
"ConvertF32x2ToF6x2Op.");
194+
return emitOpError("Only ")
195+
<< mlir::Float6E2M3FNType::get(getContext()) << " and "
196+
<< mlir::Float6E3M2FNType::get(getContext())
197+
<< " types are supported for conversions from f32x2 to f6x2.";
196198
}
197199
return success();
198200
}
@@ -212,38 +214,48 @@ LogicalResult ConvertF32x2ToF8x2Op::verify() {
212214
.Case<mlir::Float8E4M3FNType, mlir::Float8E5M2Type>(
213215
[&](mlir::Type) -> LogicalResult {
214216
if (!isRoundingModeRN) {
215-
return emitOpError(
216-
"Only RN rounding mode is supported for conversions from "
217-
"f32x2 to f8E4M3FNx2 or f8E5M2x2 types");
217+
return emitOpError("Only RN rounding mode is supported for "
218+
"conversions from f32x2 to ")
219+
<< mlir::Float8E4M3FNType::get(getContext()) << " and "
220+
<< mlir::Float8E5M2Type::get(getContext()) << " types";
218221
}
219222
if (!isSatFinite) {
220-
return emitOpError(
221-
"Only SATFINITE saturation mode is supported for conversions "
222-
"from f32x2 to f8E4M3FNx2 or f8E5M2x2 types");
223+
return emitOpError("Only SATFINITE saturation mode is supported "
224+
"for conversions "
225+
"from f32x2 to ")
226+
<< mlir::Float8E4M3FNType::get(getContext()) << " and "
227+
<< mlir::Float8E5M2Type::get(getContext()) << " types";
223228
}
224229
return success();
225230
})
226231
.Case<mlir::Float8E8M0FNUType>([&](mlir::Type) -> LogicalResult {
227232
if (!(isRoundingModeRZ || isRoundingModeRP)) {
228-
return emitOpError("Only RZ or RP rounding modes are supported for "
229-
"conversions from f32x2 to f8E8M0FNUx2 type");
233+
return emitOpError("Only RZ and RP rounding modes are supported for "
234+
"conversions from f32x2 to ")
235+
<< mlir::Float8E8M0FNUType::get(getContext()) << " type";
230236
}
231237
if (hasRelu) {
232-
return emitOpError(
233-
"relu not supported for conversions to f8E8M0FNUx2 type");
238+
return emitOpError("relu not supported for conversions to ")
239+
<< mlir::Float8E8M0FNUType::get(getContext()) << " type";
234240
}
235241
return success();
236242
})
237243
.Default([this](mlir::Type) {
238-
return emitOpError("Only f8e4m3fn, f8e5m2, and f8e8m0fnu types are "
239-
"supported for conversions from f32x2 to f8x2");
244+
return emitOpError("Only ")
245+
<< mlir::Float8E4M3FNType::get(getContext()) << ", "
246+
<< mlir::Float8E5M2Type::get(getContext()) << ", and "
247+
<< mlir::Float8E8M0FNUType::get(getContext())
248+
<< " types are "
249+
"supported for conversions from f32x2 to f8x2";
240250
});
241251
}
242252

243253
LogicalResult ConvertF16x2ToF8x2Op::verify() {
244254
if (!llvm::isa<mlir::Float8E4M3FNType, mlir::Float8E5M2Type>(getDstTy())) {
245-
return emitOpError("Only f8E4M3FN or f8E5M2 types are supported for "
246-
"conversions from f16x2 to f8x2.");
255+
return emitOpError("Only ")
256+
<< mlir::Float8E4M3FNType::get(getContext()) << " and "
257+
<< mlir::Float8E5M2Type::get(getContext())
258+
<< " types are supported for conversions from f16x2 to f8x2.";
247259
}
248260
return success();
249261
}
@@ -252,8 +264,9 @@ LogicalResult ConvertBF16x2ToF8x2Op::verify() {
252264
using RndMode = NVVM::FPRoundingMode;
253265

254266
if (!llvm::isa<mlir::Float8E8M0FNUType>(getDstTy()))
255-
return emitOpError("Only f8E8M0FNU type is supported for conversions from "
256-
"bf16x2 to f8x2.");
267+
return emitOpError("Only ") << mlir::Float8E8M0FNUType::get(getContext())
268+
<< " type is supported for conversions from "
269+
"bf16x2 to f8x2.";
257270

258271
auto rnd = getRnd();
259272
if (!(rnd == RndMode::RZ || rnd == RndMode::RP))

‎mlir/test/Target/LLVMIR/nvvmir-invalid.mlir‎

Lines changed: 16 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -175,63 +175,63 @@ llvm.func @nvvm_match_sync_any(%val32: i32, %thread_mask: i32) {
175175
// -----
176176

177177
llvm.func @nvvm_cvt_float_to_f8x2_invalid_rounding_e4m3(%a : f32, %b : f32) {
178-
// expected-error @below {{Only RN rounding mode is supported for conversions from f32x2 to f8E4M3FNx2 or f8E5M2x2 types}}
178+
// expected-error @below {{Only RN rounding mode is supported for conversions from f32x2 to 'f8E4M3FN' and 'f8E5M2' types}}
179179
%res = nvvm.convert.f32x2.to.f8x2 %a, %b {rnd = #nvvm.fp_rnd_mode<rz>, sat = #nvvm.sat_mode<satfinite>} : i16 (f8E4M3FN)
180180
llvm.return
181181
}
182182

183183
// -----
184184

185185
llvm.func @nvvm_cvt_float_to_f8x2_invalid_rounding_e5m2(%a : f32, %b : f32) {
186-
// expected-error @below {{Only RN rounding mode is supported for conversions from f32x2 to f8E4M3FNx2 or f8E5M2x2 types}}
186+
// expected-error @below {{Only RN rounding mode is supported for conversions from f32x2 to 'f8E4M3FN' and 'f8E5M2' types}}
187187
%res = nvvm.convert.f32x2.to.f8x2 %a, %b {rnd = #nvvm.fp_rnd_mode<rp>, sat = #nvvm.sat_mode<satfinite>} : i16 (f8E5M2)
188188
llvm.return
189189
}
190190

191191
// -----
192192

193193
llvm.func @nvvm_cvt_float_to_f8x2_invalid_rounding_ue8m0(%a : f32, %b : f32) {
194-
// expected-error @below {{Only RZ or RP rounding modes are supported for conversions from f32x2 to f8E8M0FNUx2 type}}
194+
// expected-error @below {{Only RZ and RP rounding modes are supported for conversions from f32x2 to 'f8E8M0FNU' type}}
195195
%res = nvvm.convert.f32x2.to.f8x2 %a, %b {rnd = #nvvm.fp_rnd_mode<rn>} : i16 (f8E8M0FNU)
196196
llvm.return
197197
}
198198

199199
// -----
200200

201201
llvm.func @nvvm_cvt_float_to_f8x2_invalid_saturation_e4m3(%a : f32, %b : f32) {
202-
// expected-error @below {{Only SATFINITE saturation mode is supported for conversions from f32x2 to f8E4M3FNx2 or f8E5M2x2 types}}
202+
// expected-error @below {{Only SATFINITE saturation mode is supported for conversions from f32x2 to 'f8E4M3FN' and 'f8E5M2' types}}
203203
%res = nvvm.convert.f32x2.to.f8x2 %a, %b {rnd = #nvvm.fp_rnd_mode<rn>, sat = #nvvm.sat_mode<none>} : i16 (f8E4M3FN)
204204
llvm.return
205205
}
206206

207207
// -----
208208

209209
llvm.func @nvvm_cvt_float_to_f8x2_invalid_saturation_e5m2(%a : f32, %b : f32) {
210-
// expected-error @below {{Only SATFINITE saturation mode is supported for conversions from f32x2 to f8E4M3FNx2 or f8E5M2x2 types}}
210+
// expected-error @below {{Only SATFINITE saturation mode is supported for conversions from f32x2 to 'f8E4M3FN' and 'f8E5M2' types}}
211211
%res = nvvm.convert.f32x2.to.f8x2 %a, %b {rnd = #nvvm.fp_rnd_mode<rn>, sat = #nvvm.sat_mode<none>} : i16 (f8E5M2)
212212
llvm.return
213213
}
214214

215215
// -----
216216

217217
llvm.func @nvvm_cvt_float_to_f8x2_relu_not_supported_ue8m0(%a : f32, %b : f32) {
218-
// expected-error @below {{relu not supported for conversions to f8E8M0FNUx2 type}}
218+
// expected-error @below {{relu not supported for conversions to 'f8E8M0FNU' type}}
219219
%res = nvvm.convert.f32x2.to.f8x2 %a, %b {rnd = #nvvm.fp_rnd_mode<rp>, relu = true} : i16 (f8E8M0FNU)
220220
llvm.return
221221
}
222222

223223
// -----
224224

225225
llvm.func @nvvm_cvt_f16x2_to_f8x2_invalid_type(%src : vector<2xf16>) {
226-
// expected-error @below {{Only f8E4M3FN or f8E5M2 types are supported for conversions from f16x2 to f8x2.}}
226+
// expected-error @below {{Only 'f8E4M3FN' and 'f8E5M2' types are supported for conversions from f16x2 to f8x2.}}
227227
%res = nvvm.convert.f16x2.to.f8x2 %src : vector<2xf16> -> i16 (f8E8M0FNU)
228228
llvm.return
229229
}
230230

231231
// -----
232232

233233
llvm.func @nvvm_cvt_bf16x2_to_f8x2_invalid_type(%src : vector<2xbf16>) {
234-
// expected-error @below {{Only f8E8M0FNU type is supported for conversions from bf16x2 to f8x2.}}
234+
// expected-error @below {{Only 'f8E8M0FNU' type is supported for conversions from bf16x2 to f8x2.}}
235235
%res = nvvm.convert.bf16x2.to.f8x2 %src {rnd = #nvvm.fp_rnd_mode<rz>} : vector<2xbf16> -> i16 (f8E4M3FN)
236236
llvm.return
237237
}
@@ -246,6 +246,14 @@ llvm.func @nvvm_cvt_bf16x2_to_f8x2_invalid_rounding(%src : vector<2xbf16>) {
246246

247247
// -----
248248

249+
llvm.func @nvvm_cvt_f32x2_to_f6x2_invalid_type(%a : f32, %b : f32) {
250+
// expected-error @below {{Only 'f6E2M3FN' and 'f6E3M2FN' types are supported for conversions from f32x2 to f6x2.}}
251+
%res = nvvm.convert.f32x2.to.f6x2 %a, %b : i16 (f8E8M0FNU)
252+
llvm.return
253+
}
254+
255+
// -----
256+
249257
llvm.func @nvvm_prefetch_L1_with_evict_priority(%global_ptr: !llvm.ptr<1>) {
250258
// expected-error @below {{cache eviction priority supported only for cache level L2}}
251259
nvvm.prefetch level = L1, evict_priority = evict_last, %global_ptr : !llvm.ptr<1>

0 commit comments

Comments
 (0)