@@ -559,10 +559,10 @@ class LoongArchOperand : public MCParsedAsmOperand {
559559 return Op;
560560 }
561561
562- static std::unique_ptr<LoongArchOperand> createReg (unsigned RegNo , SMLoc S,
562+ static std::unique_ptr<LoongArchOperand> createReg (MCRegister Reg , SMLoc S,
563563 SMLoc E) {
564564 auto Op = std::make_unique<LoongArchOperand>(KindTy::Register);
565- Op->Reg .RegNum = RegNo ;
565+ Op->Reg .RegNum = Reg ;
566566 Op->StartLoc = S;
567567 Op->EndLoc = E;
568568 return Op;
@@ -1424,9 +1424,9 @@ unsigned LoongArchAsmParser::checkTargetMatchPredicate(MCInst &Inst) {
14241424 switch (Opc) {
14251425 default :
14261426 if (Opc >= LoongArch::AMADD_D && Opc <= LoongArch::AMXOR_W) {
1427- unsigned Rd = Inst.getOperand (0 ).getReg ();
1428- unsigned Rk = Inst.getOperand (1 ).getReg ();
1429- unsigned Rj = Inst.getOperand (2 ).getReg ();
1427+ MCRegister Rd = Inst.getOperand (0 ).getReg ();
1428+ MCRegister Rk = Inst.getOperand (1 ).getReg ();
1429+ MCRegister Rj = Inst.getOperand (2 ).getReg ();
14301430 if ((Rd == Rk || Rd == Rj) && Rd != LoongArch::R0)
14311431 return Match_RequiresAMORdDifferRkRj;
14321432 }
@@ -1435,7 +1435,7 @@ unsigned LoongArchAsmParser::checkTargetMatchPredicate(MCInst &Inst) {
14351435 case LoongArch::PseudoLA_TLS_DESC_ABS_LARGE:
14361436 case LoongArch::PseudoLA_TLS_DESC_PC:
14371437 case LoongArch::PseudoLA_TLS_DESC_PC_LARGE: {
1438- unsigned Rd = Inst.getOperand (0 ).getReg ();
1438+ MCRegister Rd = Inst.getOperand (0 ).getReg ();
14391439 if (Rd != LoongArch::R4)
14401440 return Match_RequiresLAORdR4;
14411441 break ;
@@ -1445,15 +1445,15 @@ unsigned LoongArchAsmParser::checkTargetMatchPredicate(MCInst &Inst) {
14451445 case LoongArch::PseudoLA_TLS_IE_LARGE:
14461446 case LoongArch::PseudoLA_TLS_LD_LARGE:
14471447 case LoongArch::PseudoLA_TLS_GD_LARGE: {
1448- unsigned Rd = Inst.getOperand (0 ).getReg ();
1449- unsigned Rj = Inst.getOperand (1 ).getReg ();
1448+ MCRegister Rd = Inst.getOperand (0 ).getReg ();
1449+ MCRegister Rj = Inst.getOperand (1 ).getReg ();
14501450 if (Rd == Rj)
14511451 return Match_RequiresLAORdDifferRj;
14521452 break ;
14531453 }
14541454 case LoongArch::CSRXCHG:
14551455 case LoongArch::GCSRXCHG: {
1456- unsigned Rj = Inst.getOperand (2 ).getReg ();
1456+ MCRegister Rj = Inst.getOperand (2 ).getReg ();
14571457 if (Rj == LoongArch::R0 || Rj == LoongArch::R1)
14581458 return Match_RequiresOpnd2NotR0R1;
14591459 return Match_Success;
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