@@ -215,11 +215,9 @@ namespace {
215215 : MI(mi), Def(def), FI(fi) {}
216216 };
217217
218- void HoistRegionPostRA (MachineLoop *CurLoop,
219- MachineBasicBlock *CurPreheader);
218+ void HoistRegionPostRA (MachineLoop *CurLoop);
220219
221- void HoistPostRA (MachineInstr *MI, Register Def, MachineLoop *CurLoop,
222- MachineBasicBlock *CurPreheader);
220+ void HoistPostRA (MachineInstr *MI, Register Def, MachineLoop *CurLoop);
223221
224222 void ProcessMI (MachineInstr *MI, BitVector &RUDefs, BitVector &RUClobbers,
225223 SmallDenseSet<int > &StoredFIs,
@@ -259,8 +257,7 @@ namespace {
259257 DenseMap<MachineDomTreeNode *, unsigned > &OpenChildren,
260258 const DenseMap<MachineDomTreeNode *, MachineDomTreeNode *> &ParentMap);
261259
262- void HoistOutOfLoop (MachineDomTreeNode *HeaderN, MachineLoop *CurLoop,
263- MachineBasicBlock *CurPreheader);
260+ void HoistOutOfLoop (MachineDomTreeNode *HeaderN, MachineLoop *CurLoop);
264261
265262 void InitRegPressure (MachineBasicBlock *BB);
266263
@@ -291,8 +288,7 @@ namespace {
291288
292289 bool isTgtHotterThanSrc (MachineBasicBlock *SrcBlock,
293290 MachineBasicBlock *TgtBlock);
294- MachineBasicBlock *getCurPreheader (MachineLoop *CurLoop,
295- MachineBasicBlock *CurPreheader);
291+ MachineBasicBlock *getOrCreatePreheader (MachineLoop *CurLoop);
296292 };
297293
298294 class MachineLICMBase : public MachineFunctionPass {
@@ -417,16 +413,15 @@ bool MachineLICMImpl::run(MachineFunction &MF) {
417413 SmallVector<MachineLoop *, 8 > Worklist (MLI->begin (), MLI->end ());
418414 while (!Worklist.empty ()) {
419415 MachineLoop *CurLoop = Worklist.pop_back_val ();
420- MachineBasicBlock *CurPreheader = nullptr ;
421416
422- if (!PreRegAlloc)
423- HoistRegionPostRA (CurLoop, CurPreheader );
424- else {
417+ if (!PreRegAlloc) {
418+ HoistRegionPostRA (CurLoop);
419+ } else {
425420 // CSEMap is initialized for loop header when the first instruction is
426421 // being hoisted.
427422 MachineDomTreeNode *N = MDTU->getDomTree ().getNode (CurLoop->getHeader ());
428423 FirstInLoop = true ;
429- HoistOutOfLoop (N, CurLoop, CurPreheader );
424+ HoistOutOfLoop (N, CurLoop);
430425 CSEMap.clear ();
431426 }
432427 }
@@ -606,9 +601,8 @@ void MachineLICMImpl::ProcessMI(MachineInstr *MI, BitVector &RUDefs,
606601
607602// / Walk the specified region of the CFG and hoist loop invariants out to the
608603// / preheader.
609- void MachineLICMImpl::HoistRegionPostRA (MachineLoop *CurLoop,
610- MachineBasicBlock *CurPreheader) {
611- MachineBasicBlock *Preheader = getCurPreheader (CurLoop, CurPreheader);
604+ void MachineLICMImpl::HoistRegionPostRA (MachineLoop *CurLoop) {
605+ MachineBasicBlock *Preheader = getOrCreatePreheader (CurLoop);
612606 if (!Preheader)
613607 return ;
614608
@@ -702,7 +696,7 @@ void MachineLICMImpl::HoistRegionPostRA(MachineLoop *CurLoop,
702696 }
703697
704698 if (Safe)
705- HoistPostRA (MI, Candidate.Def , CurLoop, CurPreheader );
699+ HoistPostRA (MI, Candidate.Def , CurLoop);
706700 }
707701}
708702
@@ -726,9 +720,8 @@ void MachineLICMImpl::AddToLiveIns(MCRegister Reg, MachineLoop *CurLoop) {
726720// / When an instruction is found to only use loop invariant operands that is
727721// / safe to hoist, this instruction is called to do the dirty work.
728722void MachineLICMImpl::HoistPostRA (MachineInstr *MI, Register Def,
729- MachineLoop *CurLoop,
730- MachineBasicBlock *CurPreheader) {
731- MachineBasicBlock *Preheader = getCurPreheader (CurLoop, CurPreheader);
723+ MachineLoop *CurLoop) {
724+ MachineBasicBlock *Preheader = CurLoop->getLoopPreheader ();
732725
733726 // Now move the instructions to the predecessor, inserting it before any
734727 // terminator instructions.
@@ -831,9 +824,8 @@ void MachineLICMImpl::ExitScopeIfDone(
831824// / order w.r.t the DominatorTree. This allows us to visit definitions before
832825// / uses, allowing us to hoist a loop body in one pass without iteration.
833826void MachineLICMImpl::HoistOutOfLoop (MachineDomTreeNode *HeaderN,
834- MachineLoop *CurLoop,
835- MachineBasicBlock *CurPreheader) {
836- MachineBasicBlock *Preheader = getCurPreheader (CurLoop, CurPreheader);
827+ MachineLoop *CurLoop) {
828+ MachineBasicBlock *Preheader = getOrCreatePreheader (CurLoop);
837829 if (!Preheader)
838830 return ;
839831
@@ -1714,34 +1706,23 @@ unsigned MachineLICMImpl::Hoist(MachineInstr *MI, MachineBasicBlock *Preheader,
17141706}
17151707
17161708// / Get the preheader for the current loop, splitting a critical edge if needed.
1717- MachineBasicBlock *
1718- MachineLICMImpl::getCurPreheader (MachineLoop *CurLoop,
1719- MachineBasicBlock *CurPreheader) {
1709+ MachineBasicBlock *MachineLICMImpl::getOrCreatePreheader (MachineLoop *CurLoop) {
17201710 // Determine the block to which to hoist instructions. If we can't find a
17211711 // suitable loop predecessor, we can't do any hoisting.
1722-
1723- // If we've tried to get a preheader and failed, don't try again.
1724- if (CurPreheader == reinterpret_cast <MachineBasicBlock *>(-1 ))
1725- return nullptr ;
1726-
1727- if (!CurPreheader) {
1728- CurPreheader = CurLoop->getLoopPreheader ();
1729- if (!CurPreheader) {
1730- MachineBasicBlock *Pred = CurLoop->getLoopPredecessor ();
1731- if (!Pred) {
1732- CurPreheader = reinterpret_cast <MachineBasicBlock *>(-1 );
1733- return nullptr ;
1734- }
1735-
1736- CurPreheader = Pred->SplitCriticalEdge (CurLoop->getHeader (), LegacyPass,
1737- MFAM, nullptr , MDTU);
1738- if (!CurPreheader) {
1739- CurPreheader = reinterpret_cast <MachineBasicBlock *>(-1 );
1740- return nullptr ;
1741- }
1742- }
1712+ if (MachineBasicBlock *Preheader = CurLoop->getLoopPreheader ())
1713+ return Preheader;
1714+
1715+ // Try forming a preheader by splitting the critical edge between the single
1716+ // predecessor and the loop header.
1717+ if (MachineBasicBlock *Pred = CurLoop->getLoopPredecessor ()) {
1718+ MachineBasicBlock *NewPreheader = Pred->SplitCriticalEdge (
1719+ CurLoop->getHeader (), LegacyPass, MFAM, nullptr , MDTU);
1720+ if (NewPreheader)
1721+ Changed = true ;
1722+ return NewPreheader;
17431723 }
1744- return CurPreheader;
1724+
1725+ return nullptr ;
17451726}
17461727
17471728// / Is the target basic block at least "BlockFrequencyRatioThreshold"
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