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RKSimonRKSimon
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[DAG] getNode - fold (sext (trunc x)) -> x iff the upper bits are already signbits (#151945)
Similar to what we already do for ZERO_EXTEND/ANY_EXTEND patterns.
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3 files changed

+30
-15
lines changed

3 files changed

+30
-15
lines changed

‎llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

Lines changed: 14 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -6422,6 +6422,20 @@ SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
64226422
if (N1.isUndef())
64236423
// sext(undef) = 0, because the top bits will all be the same.
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return getConstant(0, DL, VT);
6425+
6426+
// Skip unnecessary sext_inreg pattern:
6427+
// (sext (trunc x)) -> x iff the upper bits are all signbits.
6428+
if (OpOpcode == ISD::TRUNCATE) {
6429+
SDValue OpOp = N1.getOperand(0);
6430+
if (OpOp.getValueType() == VT) {
6431+
unsigned NumSignExtBits =
6432+
VT.getScalarSizeInBits() - N1.getScalarValueSizeInBits();
6433+
if (ComputeNumSignBits(OpOp) > NumSignExtBits) {
6434+
transferDbgValues(N1, OpOp);
6435+
return OpOp;
6436+
}
6437+
}
6438+
}
64256439
break;
64266440
case ISD::ZERO_EXTEND:
64276441
assert(VT.isInteger() && N1.getValueType().isInteger() &&

‎llvm/test/CodeGen/PowerPC/aix-cc-abi-mir.ll

Lines changed: 12 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -37,19 +37,19 @@ define signext i8 @test_chars(i8 signext %c1, i8 signext %c2, i8 signext %c3, i8
3737
; 32BIT: bb.0.entry:
3838
; 32BIT-NEXT: liveins: $r3, $r4, $r5, $r6
3939
; 32BIT-NEXT: {{ $}}
40-
; 32BIT-NEXT: renamable $r3 = ADD4 killed renamable $r3, killed renamable $r4
41-
; 32BIT-NEXT: renamable $r3 = ADD4 killed renamable $r3, killed renamable $r5
42-
; 32BIT-NEXT: renamable $r3 = ADD4 killed renamable $r3, killed renamable $r6
40+
; 32BIT-NEXT: renamable $r3 = nsw ADD4 killed renamable $r3, killed renamable $r4
41+
; 32BIT-NEXT: renamable $r3 = nsw ADD4 killed renamable $r3, killed renamable $r5
42+
; 32BIT-NEXT: renamable $r3 = nsw ADD4 killed renamable $r3, killed renamable $r6
4343
; 32BIT-NEXT: renamable $r3 = EXTSB killed renamable $r3
4444
; 32BIT-NEXT: BLR implicit $lr, implicit $rm, implicit $r3
4545
;
4646
; 64BIT-LABEL: name: test_chars
4747
; 64BIT: bb.0.entry:
4848
; 64BIT-NEXT: liveins: $x3, $x4, $x5, $x6
4949
; 64BIT-NEXT: {{ $}}
50-
; 64BIT-NEXT: renamable $r3 = ADD4 renamable $r3, renamable $r4, implicit killed $x4, implicit killed $x3
51-
; 64BIT-NEXT: renamable $r3 = ADD4 killed renamable $r3, renamable $r5, implicit killed $x5
52-
; 64BIT-NEXT: renamable $r3 = ADD4 killed renamable $r3, renamable $r6, implicit killed $x6, implicit-def $x3
50+
; 64BIT-NEXT: renamable $r3 = nsw ADD4 renamable $r3, renamable $r4, implicit killed $x4, implicit killed $x3
51+
; 64BIT-NEXT: renamable $r3 = nsw ADD4 killed renamable $r3, renamable $r5, implicit killed $x5
52+
; 64BIT-NEXT: renamable $r3 = nsw ADD4 killed renamable $r3, renamable $r6, implicit killed $x6, implicit-def $x3
5353
; 64BIT-NEXT: renamable $x3 = EXTSB8 killed renamable $x3
5454
; 64BIT-NEXT: BLR8 implicit $lr8, implicit $rm, implicit $x3
5555
entry:
@@ -96,19 +96,19 @@ define signext i8 @test_chars_mix(i8 signext %c1, i8 zeroext %c2, i8 zeroext %c3
9696
; 32BIT: bb.0.entry:
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; 32BIT-NEXT: liveins: $r3, $r4, $r5, $r6
9898
; 32BIT-NEXT: {{ $}}
99-
; 32BIT-NEXT: renamable $r3 = ADD4 killed renamable $r3, killed renamable $r4
100-
; 32BIT-NEXT: renamable $r3 = ADD4 killed renamable $r3, killed renamable $r5
101-
; 32BIT-NEXT: renamable $r3 = ADD4 killed renamable $r3, killed renamable $r6
99+
; 32BIT-NEXT: renamable $r3 = nsw ADD4 killed renamable $r3, killed renamable $r4
100+
; 32BIT-NEXT: renamable $r3 = nsw ADD4 killed renamable $r3, killed renamable $r5
101+
; 32BIT-NEXT: renamable $r3 = nsw ADD4 killed renamable $r3, killed renamable $r6
102102
; 32BIT-NEXT: renamable $r3 = EXTSB killed renamable $r3
103103
; 32BIT-NEXT: BLR implicit $lr, implicit $rm, implicit $r3
104104
;
105105
; 64BIT-LABEL: name: test_chars_mix
106106
; 64BIT: bb.0.entry:
107107
; 64BIT-NEXT: liveins: $x3, $x4, $x5, $x6
108108
; 64BIT-NEXT: {{ $}}
109-
; 64BIT-NEXT: renamable $r3 = ADD4 renamable $r3, renamable $r4, implicit killed $x4, implicit killed $x3
110-
; 64BIT-NEXT: renamable $r3 = ADD4 killed renamable $r3, renamable $r5, implicit killed $x5
111-
; 64BIT-NEXT: renamable $r3 = ADD4 killed renamable $r3, renamable $r6, implicit killed $x6, implicit-def $x3
109+
; 64BIT-NEXT: renamable $r3 = nsw ADD4 renamable $r3, renamable $r4, implicit killed $x4, implicit killed $x3
110+
; 64BIT-NEXT: renamable $r3 = nsw ADD4 killed renamable $r3, renamable $r5, implicit killed $x5
111+
; 64BIT-NEXT: renamable $r3 = nsw ADD4 killed renamable $r3, renamable $r6, implicit killed $x6, implicit-def $x3
112112
; 64BIT-NEXT: renamable $x3 = EXTSB8 killed renamable $x3
113113
; 64BIT-NEXT: BLR8 implicit $lr8, implicit $rm, implicit $x3
114114
entry:

‎llvm/test/CodeGen/X86/trunc-nsw-nuw.ll

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -62,10 +62,11 @@ entry:
6262
define i32 @simplify_demanded_bits_drop_flag(i1 zeroext %x, i1 zeroext %y) nounwind {
6363
; CHECK-LABEL: simplify_demanded_bits_drop_flag:
6464
; CHECK: # %bb.0: # %entry
65-
; CHECK-NEXT: negl %edi
65+
; CHECK-NEXT: # kill: def $esi killed $esi def $rsi
6666
; CHECK-NEXT: shll $2, %esi
67-
; CHECK-NEXT: xorl %edi, %esi
68-
; CHECK-NEXT: movslq %esi, %rax
67+
; CHECK-NEXT: movl %edi, %eax
68+
; CHECK-NEXT: negq %rax
69+
; CHECK-NEXT: xorq %rsi, %rax
6970
; CHECK-NEXT: imulq $-1634202141, %rax, %rax # imm = 0x9E980DE3
7071
; CHECK-NEXT: movq %rax, %rcx
7172
; CHECK-NEXT: shrq $63, %rcx

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