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- Rename isLane1KnownActive -> isLane0KnownActive
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llvm/lib/Target/AArch64/AArch64ISelLowering.cpp

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -27236,12 +27236,12 @@ static bool isLanes1toNKnownZero(SDValue Op) {
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// Return true if the vector operation can guarantee that the first lane of its
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// result is active.
27239-
static bool isLane1KnownActive(SDValue Op) {
27239+
static bool isLane0KnownActive(SDValue Op) {
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switch (Op.getOpcode()) {
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default:
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return false;
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case AArch64ISD::REINTERPRET_CAST:
27244-
return isLane1KnownActive(Op->getOperand(0));
27244+
return isLane0KnownActive(Op->getOperand(0));
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case ISD::SPLAT_VECTOR:
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return isOneConstant(Op.getOperand(0));
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case AArch64ISD::PTRUE:
@@ -27547,7 +27547,7 @@ static SDValue performPTestFirstCombine(SDNode *N,
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if (Pred->getOpcode() == AArch64ISD::REINTERPRET_CAST)
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Pred = Pred->getOperand(0);
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27550-
if (!isLane1KnownActive(Mask))
27550+
if (!isLane0KnownActive(Mask))
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return SDValue();
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if (Pred->getOpcode() == ISD::CONCAT_VECTORS) {

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