|
1 | | -; NOTE: Assertions have been autogenerated by utils/update_test_checks.py |
2 | | -; RUN: opt < %s -passes=sroa -S | FileCheck %s |
| 1 | +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6 |
| 2 | +; RUN: opt %s -passes=sroa -S | FileCheck %s |
3 | 3 |
|
4 | | -; Test that SROA converts array types to integer types for promotion. |
| 4 | +target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" |
| 5 | +target triple = "x86_64-pc-linux-gnu" |
5 | 6 |
|
6 | | -target datalayout = "e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-n32:64-S128-Fn32-ni:10:11:12:13" |
| 7 | +%"struct.pbrt::RaySamples" = type { %struct.anon.45, %struct.anon.46, i8, %struct.anon.47 } |
| 8 | +%struct.anon.45 = type { %"class.pbrt::Point2", float } |
| 9 | +%"class.pbrt::Point2" = type { %"class.pbrt::Tuple2" } |
| 10 | +%"class.pbrt::Tuple2" = type { float, float } |
| 11 | +%struct.anon.46 = type { float, float, %"class.pbrt::Point2" } |
| 12 | +%struct.anon.47 = type { float, %"class.pbrt::Point2" } |
7 | 13 |
|
8 | | -define void @test_float_array_only_intrinsics() { |
9 | | -; CHECK-LABEL: @test_float_array_only_intrinsics( |
10 | | -; CHECK-NEXT: entry: |
11 | | -; CHECK-NEXT: ret void |
| 14 | +define <2 x float> @subsurface_test() local_unnamed_addr { |
| 15 | +; CHECK-LABEL: define <2 x float> @subsurface_test() local_unnamed_addr { |
| 16 | +; CHECK-NEXT: [[TMP1:%.*]] = load float, ptr inttoptr (i64 12 to ptr), align 4 |
| 17 | +; CHECK-NEXT: [[TMP2:%.*]] = fptosi float [[TMP1]] to i32 |
| 18 | +; CHECK-NEXT: [[TMP3:%.*]] = trunc i32 [[TMP2]] to i1 |
| 19 | +; CHECK-NEXT: br i1 [[TMP3]], label %[[BB4:.*]], label %[[_ZNK4PBRT3SOAINS_10RAYSAMPLESEEIXEI_EXIT:.*]] |
| 20 | +; CHECK: [[BB4]]: |
| 21 | +; CHECK-NEXT: [[TMP5:%.*]] = load volatile { <2 x float>, <2 x float> }, ptr null, align 8 |
| 22 | +; CHECK-NEXT: [[TMP6:%.*]] = extractvalue { <2 x float>, <2 x float> } [[TMP5]], 0 |
| 23 | +; CHECK-NEXT: [[TMP7:%.*]] = extractvalue { <2 x float>, <2 x float> } [[TMP5]], 1 |
| 24 | +; CHECK-NEXT: [[BC_I:%.*]] = bitcast <2 x float> [[TMP6]] to <2 x i32> |
| 25 | +; CHECK-NEXT: [[TMP8:%.*]] = extractelement <2 x i32> [[BC_I]], i64 1 |
| 26 | +; CHECK-NEXT: [[BC2_I:%.*]] = bitcast <2 x float> [[TMP7]] to <2 x i32> |
| 27 | +; CHECK-NEXT: [[TMP9:%.*]] = extractelement <2 x i32> [[BC2_I]], i64 0 |
| 28 | +; CHECK-NEXT: [[TMP12:%.*]] = bitcast i32 [[TMP8]] to float |
| 29 | +; CHECK-NEXT: [[DOTSROA_1_36_VEC_INSERT:%.*]] = insertelement <2 x float> zeroinitializer, float [[TMP12]], i32 0 |
| 30 | +; CHECK-NEXT: [[TMP11:%.*]] = bitcast i32 [[TMP9]] to float |
| 31 | +; CHECK-NEXT: [[DOTSROA_1_40_VEC_INSERT:%.*]] = insertelement <2 x float> [[DOTSROA_1_36_VEC_INSERT]], float [[TMP11]], i32 1 |
| 32 | +; CHECK-NEXT: br label %[[_ZNK4PBRT3SOAINS_10RAYSAMPLESEEIXEI_EXIT]] |
| 33 | +; CHECK: [[_ZNK4PBRT3SOAINS_10RAYSAMPLESEEIXEI_EXIT]]: |
| 34 | +; CHECK-NEXT: [[TMP10:%.*]] = phi <2 x float> [ [[DOTSROA_1_40_VEC_INSERT]], %[[BB4]] ], [ zeroinitializer, [[TMP0:%.*]] ] |
| 35 | +; CHECK-NEXT: ret <2 x float> [[TMP10]] |
12 | 36 | ; |
13 | | -entry: |
14 | | - %src = alloca [2 x float], align 4 |
15 | | - %dst = alloca [2 x float], align 4 |
| 37 | + %1 = alloca %"struct.pbrt::RaySamples", align 4 |
| 38 | + %2 = getelementptr i8, ptr %1, i64 36 |
| 39 | + store i64 0, ptr %2, align 4 |
| 40 | + %3 = load float, ptr inttoptr (i64 12 to ptr), align 4 |
| 41 | + %4 = fptosi float %3 to i32 |
| 42 | + %5 = trunc i32 %4 to i1 |
| 43 | + br i1 %5, label %6, label %_ZNK4pbrt3SOAINS_10RaySamplesEEixEi.exit |
16 | 44 |
|
17 | | - call void @llvm.lifetime.start.p0(i64 8, ptr %src) |
18 | | - call void @llvm.lifetime.start.p0(i64 8, ptr %dst) |
| 45 | +6: ; preds = %0 |
| 46 | + %7 = load volatile { <2 x float>, <2 x float> }, ptr null, align 8 |
| 47 | + %8 = extractvalue { <2 x float>, <2 x float> } %7, 0 |
| 48 | + %9 = extractvalue { <2 x float>, <2 x float> } %7, 1 |
| 49 | + store float 0.000000e+00, ptr %1, align 4 |
| 50 | + %bc.i = bitcast <2 x float> %8 to <2 x i32> |
| 51 | + %10 = extractelement <2 x i32> %bc.i, i64 1 |
| 52 | + %bc2.i = bitcast <2 x float> %9 to <2 x i32> |
| 53 | + %11 = extractelement <2 x i32> %bc2.i, i64 0 |
| 54 | + store i32 %10, ptr %2, align 4 |
| 55 | + %.sroa_idx1.i = getelementptr i8, ptr %1, i64 40 |
| 56 | + store i32 %11, ptr %.sroa_idx1.i, align 4 |
| 57 | + br label %_ZNK4pbrt3SOAINS_10RaySamplesEEixEi.exit |
19 | 58 |
|
20 | | - ; Only intrinsic uses - no scalar loads/stores to establish common type |
21 | | - call void @llvm.memset.p0.i64(ptr %src, i8 42, i64 8, i1 false) |
22 | | - call void @llvm.memcpy.p0.p0.i64(ptr %dst, ptr %src, i64 8, i1 false) |
23 | | - call void @llvm.memcpy.p0.p0.i64(ptr %src, ptr %dst, i64 8, i1 false) |
24 | | - |
25 | | - call void @llvm.lifetime.end.p0(i64 8, ptr %dst) |
26 | | - call void @llvm.lifetime.end.p0(i64 8, ptr %src) |
27 | | - ret void |
| 59 | +_ZNK4pbrt3SOAINS_10RaySamplesEEixEi.exit: ; preds = %0, %6 |
| 60 | + %12 = getelementptr inbounds nuw i8, ptr %1, i64 36 |
| 61 | + %.sroa.01.0.copyload = load <2 x float>, ptr %12, align 4 |
| 62 | + ret <2 x float> %.sroa.01.0.copyload |
28 | 63 | } |
29 | 64 |
|
30 | 65 | define void @test_mixed_types() { |
|
39 | 74 | %val = load float, ptr %alloca |
40 | 75 | ret void |
41 | 76 | } |
42 | | - |
43 | | -declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) |
44 | | -declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) |
45 | | -declare void @llvm.lifetime.start.p0(i64, ptr nocapture) |
46 | | -declare void @llvm.lifetime.end.p0(i64, ptr nocapture) |
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