@@ -874,3 +874,79 @@ define void @load_factor2_fp128(ptr %ptr) {
874874 %v1 = shufflevector <4 x fp128 > %interleaved.vec , <4 x fp128 > poison, <2 x i32 > <i32 1 , i32 3 >
875875 ret void
876876}
877+
878+ define void @load_factor2_f32 (ptr %ptr ) {
879+ ; RV32-LABEL: @load_factor2_f32(
880+ ; RV32-NEXT: [[TMP1:%.*]] = call { <8 x float>, <8 x float> } @llvm.riscv.seg2.load.mask.v8f32.p0.i32(ptr [[PTR:%.*]], <8 x i1> splat (i1 true), i32 8)
881+ ; RV32-NEXT: [[TMP2:%.*]] = extractvalue { <8 x float>, <8 x float> } [[TMP1]], 1
882+ ; RV32-NEXT: [[TMP3:%.*]] = extractvalue { <8 x float>, <8 x float> } [[TMP1]], 0
883+ ; RV32-NEXT: ret void
884+ ;
885+ ; RV64-LABEL: @load_factor2_f32(
886+ ; RV64-NEXT: [[TMP1:%.*]] = call { <8 x float>, <8 x float> } @llvm.riscv.seg2.load.mask.v8f32.p0.i64(ptr [[PTR:%.*]], <8 x i1> splat (i1 true), i64 8)
887+ ; RV64-NEXT: [[TMP2:%.*]] = extractvalue { <8 x float>, <8 x float> } [[TMP1]], 1
888+ ; RV64-NEXT: [[TMP3:%.*]] = extractvalue { <8 x float>, <8 x float> } [[TMP1]], 0
889+ ; RV64-NEXT: ret void
890+ ;
891+ %interleaved.vec = load <16 x float >, ptr %ptr
892+ %v0 = shufflevector <16 x float > %interleaved.vec , <16 x float > poison, <8 x i32 > <i32 0 , i32 2 , i32 4 , i32 6 , i32 8 , i32 10 , i32 12 , i32 14 >
893+ %v1 = shufflevector <16 x float > %interleaved.vec , <16 x float > poison, <8 x i32 > <i32 1 , i32 3 , i32 5 , i32 7 , i32 9 , i32 11 , i32 13 , i32 15 >
894+ ret void
895+ }
896+
897+ define void @load_factor2_f64 (ptr %ptr ) {
898+ ; RV32-LABEL: @load_factor2_f64(
899+ ; RV32-NEXT: [[TMP1:%.*]] = call { <8 x double>, <8 x double> } @llvm.riscv.seg2.load.mask.v8f64.p0.i32(ptr [[PTR:%.*]], <8 x i1> splat (i1 true), i32 8)
900+ ; RV32-NEXT: [[TMP2:%.*]] = extractvalue { <8 x double>, <8 x double> } [[TMP1]], 1
901+ ; RV32-NEXT: [[TMP3:%.*]] = extractvalue { <8 x double>, <8 x double> } [[TMP1]], 0
902+ ; RV32-NEXT: ret void
903+ ;
904+ ; RV64-LABEL: @load_factor2_f64(
905+ ; RV64-NEXT: [[TMP1:%.*]] = call { <8 x double>, <8 x double> } @llvm.riscv.seg2.load.mask.v8f64.p0.i64(ptr [[PTR:%.*]], <8 x i1> splat (i1 true), i64 8)
906+ ; RV64-NEXT: [[TMP2:%.*]] = extractvalue { <8 x double>, <8 x double> } [[TMP1]], 1
907+ ; RV64-NEXT: [[TMP3:%.*]] = extractvalue { <8 x double>, <8 x double> } [[TMP1]], 0
908+ ; RV64-NEXT: ret void
909+ ;
910+ %interleaved.vec = load <16 x double >, ptr %ptr
911+ %v0 = shufflevector <16 x double > %interleaved.vec , <16 x double > poison, <8 x i32 > <i32 0 , i32 2 , i32 4 , i32 6 , i32 8 , i32 10 , i32 12 , i32 14 >
912+ %v1 = shufflevector <16 x double > %interleaved.vec , <16 x double > poison, <8 x i32 > <i32 1 , i32 3 , i32 5 , i32 7 , i32 9 , i32 11 , i32 13 , i32 15 >
913+ ret void
914+ }
915+
916+ define void @load_factor2_bf16 (ptr %ptr ) {
917+ ; RV32-LABEL: @load_factor2_bf16(
918+ ; RV32-NEXT: [[INTERLEAVED_VEC:%.*]] = load <16 x bfloat>, ptr [[PTR:%.*]], align 32
919+ ; RV32-NEXT: [[V0:%.*]] = shufflevector <16 x bfloat> [[INTERLEAVED_VEC]], <16 x bfloat> poison, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
920+ ; RV32-NEXT: [[V1:%.*]] = shufflevector <16 x bfloat> [[INTERLEAVED_VEC]], <16 x bfloat> poison, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
921+ ; RV32-NEXT: ret void
922+ ;
923+ ; RV64-LABEL: @load_factor2_bf16(
924+ ; RV64-NEXT: [[INTERLEAVED_VEC:%.*]] = load <16 x bfloat>, ptr [[PTR:%.*]], align 32
925+ ; RV64-NEXT: [[V0:%.*]] = shufflevector <16 x bfloat> [[INTERLEAVED_VEC]], <16 x bfloat> poison, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
926+ ; RV64-NEXT: [[V1:%.*]] = shufflevector <16 x bfloat> [[INTERLEAVED_VEC]], <16 x bfloat> poison, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
927+ ; RV64-NEXT: ret void
928+ ;
929+ %interleaved.vec = load <16 x bfloat>, ptr %ptr
930+ %v0 = shufflevector <16 x bfloat> %interleaved.vec , <16 x bfloat> poison, <8 x i32 > <i32 0 , i32 2 , i32 4 , i32 6 , i32 8 , i32 10 , i32 12 , i32 14 >
931+ %v1 = shufflevector <16 x bfloat> %interleaved.vec , <16 x bfloat> poison, <8 x i32 > <i32 1 , i32 3 , i32 5 , i32 7 , i32 9 , i32 11 , i32 13 , i32 15 >
932+ ret void
933+ }
934+
935+ define void @load_factor2_f16 (ptr %ptr ) {
936+ ; RV32-LABEL: @load_factor2_f16(
937+ ; RV32-NEXT: [[INTERLEAVED_VEC:%.*]] = load <16 x half>, ptr [[PTR:%.*]], align 32
938+ ; RV32-NEXT: [[V0:%.*]] = shufflevector <16 x half> [[INTERLEAVED_VEC]], <16 x half> poison, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
939+ ; RV32-NEXT: [[V1:%.*]] = shufflevector <16 x half> [[INTERLEAVED_VEC]], <16 x half> poison, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
940+ ; RV32-NEXT: ret void
941+ ;
942+ ; RV64-LABEL: @load_factor2_f16(
943+ ; RV64-NEXT: [[INTERLEAVED_VEC:%.*]] = load <16 x half>, ptr [[PTR:%.*]], align 32
944+ ; RV64-NEXT: [[V0:%.*]] = shufflevector <16 x half> [[INTERLEAVED_VEC]], <16 x half> poison, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
945+ ; RV64-NEXT: [[V1:%.*]] = shufflevector <16 x half> [[INTERLEAVED_VEC]], <16 x half> poison, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
946+ ; RV64-NEXT: ret void
947+ ;
948+ %interleaved.vec = load <16 x half >, ptr %ptr
949+ %v0 = shufflevector <16 x half > %interleaved.vec , <16 x half > poison, <8 x i32 > <i32 0 , i32 2 , i32 4 , i32 6 , i32 8 , i32 10 , i32 12 , i32 14 >
950+ %v1 = shufflevector <16 x half > %interleaved.vec , <16 x half > poison, <8 x i32 > <i32 1 , i32 3 , i32 5 , i32 7 , i32 9 , i32 11 , i32 13 , i32 15 >
951+ ret void
952+ }
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