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Author: chencha3

mlir/include/mlir/Dialect/XeGPU/Transforms/Passes.td

@@ -39,7 +39,7 @@ def XeGPUSubgroupDistribute : Pass<"xegpu-subgroup-distribute"> {
 }
 
 def XeGPUBlocking: Pass<"xegpu-blocking"> {
-  let summary = "Instructionlize XeGPU ops";
+  let summary = "Block XeGPU ops into smaller size.";
   let description = [{
     The pass unrolls XeGPU ops working on large shapes into ops working on small shapes
     (given by the inst_data in the layout attr), such that each of them can be dispatch

mlir/include/mlir/Dialect/XeGPU/Utils/XeGPUUtils.h

@@ -103,6 +103,8 @@ Value createVectorWithShapeFromValues(OpBuilder &builder, Location loc,
 /// first converted into RankedTensorType, where the layout attribute can be
 /// attached. And then upstream SCF structural type conversion patterns are
 /// applied with the provided converter.
+/// TODO: This is a temporary solution. We should refactor it when context-aware
+/// type conversion is available.
 void doSCFStructuralTypeConversionWithTensorType(Operation *op,
                                                  TypeConverter converter);
 

mlir/lib/Dialect/XeGPU/Transforms/XeGPUBlocking.cpp

@@ -33,7 +33,12 @@ using namespace mlir;
 
 namespace {
 
-void resolveUnrealizedConversionCastOp(UnrealizedConversionCastOp castOp) {
+// reslove the unrealized conversion cast ops generated when doing SCF
+// Structural Type Conversion. It will have two formats, N:1 vector
+// cast and 1:N vector cast. vector::insert_strided_slice ops will be
+// used for the first case, and vector::extract_strided_slice ops will be
+// used for the second case.
+static void resolveUnrealizedConversionCastOp(UnrealizedConversionCastOp castOp) {
   ValueRange inputs = castOp.getInputs();
   ValueRange outputs = castOp.getOutputs();