Skip to content

Commit c6b3e20

Browse files
committed
Rewrite isS34Imm() to a template function and rename function to reflect actual checks.
1 parent fe69556 commit c6b3e20

File tree

2 files changed

+7
-9
lines changed

2 files changed

+7
-9
lines changed

llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp

Lines changed: 4 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -365,14 +365,12 @@ struct PPCOperand : public MCParsedAsmOperand {
365365
bool isS16ImmX4() const { return isExtImm<16>(/*Signed*/ true, 4); }
366366
bool isS16ImmX16() const { return isExtImm<16>(/*Signed*/ true, 16); }
367367
bool isS17Imm() const { return isExtImm<17>(/*Signed*/ true, 1); }
368-
bool isS32Imm() const {
369-
// TODO: Is ContextImmediate needed?
370-
return Kind == Expression || isSImm<32>();
371-
}
372-
bool isS34Imm() const {
368+
369+
template <uint64_t N>
370+
bool isSImmExpr() const {
373371
// Once the PC-Rel ABI is finalized, evaluate whether a 34-bit
374372
// ContextImmediate is needed.
375-
return Kind == Expression || isSImm<34>();
373+
return Kind == Expression || isSImm<N>();
376374
}
377375
bool isS34ImmX16() const {
378376
return Kind == Expression || (isSImm<34>() && (getImm() & 15) == 0);

llvm/lib/Target/PowerPC/PPCRegisterInfo.td

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -810,7 +810,7 @@ def s17imm64 : Operand<i64> {
810810
}
811811
def PPCS32ImmAsmOperand : AsmOperandClass {
812812
let Name = "S32Imm";
813-
let PredicateMethod = "isS32Imm";
813+
let PredicateMethod = "isSImmExpr<32>";
814814
let RenderMethod = "addImmOperands";
815815
}
816816
def s32imm : Operand<i64> {
@@ -829,7 +829,7 @@ def s32imm_pcrel : Operand<i64> {
829829
}
830830
def PPCS34ImmAsmOperand : AsmOperandClass {
831831
let Name = "S34Imm";
832-
let PredicateMethod = "isS34Imm";
832+
let PredicateMethod = "isSImmExpr<34>";
833833
let RenderMethod = "addImmOperands";
834834
}
835835
def s34imm : Operand<i64> {
@@ -933,7 +933,7 @@ def ptr_rc_nor0 : RegisterOperand<ptr_rc_nor0_by_hwmode> {
933933

934934
// New addressing modes with 34 bit immediates.
935935
def PPCDispRI34Operand : AsmOperandClass {
936-
let Name = "DispRI34"; let PredicateMethod = "isS34Imm";
936+
let Name = "DispRI34"; let PredicateMethod = "isSImmExpr<34>";
937937
let RenderMethod = "addImmOperands";
938938
}
939939
def dispRI34 : Operand<iPTR> {

0 commit comments

Comments
 (0)