Skip to content

Commit c7799fa

Browse files
nikicnikic
committed
[InstCombine] Add more dependent IV tests (NFC)
1 parent 63a4b4f commit c7799fa

File tree

1 file changed

+288
-32
lines changed

1 file changed

+288
-32
lines changed

‎llvm/test/Transforms/InstCombine/dependent-ivs.ll‎

Lines changed: 288 additions & 32 deletions
Original file line numberDiff line numberDiff line change
@@ -195,6 +195,38 @@ exit:
195195
ret void
196196
}
197197

198+
define void @int_iv_vector_poison_invalid(<2 x i64> %base) {
199+
; CHECK-LABEL: define void @int_iv_vector_poison_invalid(
200+
; CHECK-SAME: <2 x i64> [[BASE:%.*]]) {
201+
; CHECK-NEXT: entry:
202+
; CHECK-NEXT: br label [[LOOP:%.*]]
203+
; CHECK: loop:
204+
; CHECK-NEXT: [[IV2:%.*]] = phi <2 x i64> [ [[IV2_NEXT:%.*]], [[LOOP]] ], [ [[BASE]], [[ENTRY:%.*]] ]
205+
; CHECK-NEXT: [[IV:%.*]] = phi <2 x i64> [ [[IV_NEXT:%.*]], [[LOOP]] ], [ <i64 0, i64 poison>, [[ENTRY]] ]
206+
; CHECK-NEXT: call void @use.v2i64(<2 x i64> [[IV2]])
207+
; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw <2 x i64> [[IV]], <i64 4, i64 4>
208+
; CHECK-NEXT: [[IV2_NEXT]] = add <2 x i64> [[IV_NEXT]], [[BASE]]
209+
; CHECK-NEXT: [[CMP:%.*]] = call i1 @get.i1()
210+
; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[LOOP]]
211+
; CHECK: exit:
212+
; CHECK-NEXT: ret void
213+
;
214+
entry:
215+
br label %loop
216+
217+
loop:
218+
%iv2 = phi <2 x i64> [ %iv2.next, %loop ], [ %base, %entry ]
219+
%iv = phi <2 x i64> [ %iv.next, %loop ], [ <i64 0, i64 poison>, %entry ]
220+
call void @use.v2i64(<2 x i64> %iv2)
221+
%iv.next = add nuw nsw <2 x i64> %iv, <i64 4, i64 4>
222+
%iv2.next = add <2 x i64> %iv.next, %base
223+
%cmp = call i1 @get.i1()
224+
br i1 %cmp, label %exit, label %loop
225+
226+
exit:
227+
ret void
228+
}
229+
198230
define void @int_iv_loop_variant_step(i64 %base, i64 %end) {
199231
; CHECK-LABEL: define void @int_iv_loop_variant_step(
200232
; CHECK-SAME: i64 [[BASE:%.*]], i64 [[END:%.*]]) {
@@ -229,6 +261,262 @@ exit:
229261
ret void
230262
}
231263

264+
define void @int_iv_xor(i64 %base, i64 %end) {
265+
; CHECK-LABEL: define void @int_iv_xor(
266+
; CHECK-SAME: i64 [[BASE:%.*]], i64 [[END:%.*]]) {
267+
; CHECK-NEXT: entry:
268+
; CHECK-NEXT: br label [[LOOP:%.*]]
269+
; CHECK: loop:
270+
; CHECK-NEXT: [[IV2:%.*]] = phi i64 [ [[IV2_NEXT:%.*]], [[LOOP]] ], [ [[BASE]], [[ENTRY:%.*]] ]
271+
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP]] ], [ 0, [[ENTRY]] ]
272+
; CHECK-NEXT: call void @use.i64(i64 [[IV2]])
273+
; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 4
274+
; CHECK-NEXT: [[IV2_NEXT]] = xor i64 [[IV_NEXT]], [[BASE]]
275+
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[IV_NEXT]], [[END]]
276+
; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[LOOP]]
277+
; CHECK: exit:
278+
; CHECK-NEXT: ret void
279+
;
280+
entry:
281+
br label %loop
282+
283+
loop:
284+
%iv2 = phi i64 [ %iv2.next, %loop ], [ %base, %entry ]
285+
%iv = phi i64 [ %iv.next, %loop ], [ 0, %entry ]
286+
call void @use.i64(i64 %iv2)
287+
%iv.next = add nuw nsw i64 %iv, 4
288+
%iv2.next = xor i64 %iv.next, %base
289+
%cmp = icmp eq i64 %iv.next, %end
290+
br i1 %cmp, label %exit, label %loop
291+
292+
exit:
293+
ret void
294+
}
295+
296+
define void @int_iv_or(i64 %base, i64 %end) {
297+
; CHECK-LABEL: define void @int_iv_or(
298+
; CHECK-SAME: i64 [[BASE:%.*]], i64 [[END:%.*]]) {
299+
; CHECK-NEXT: entry:
300+
; CHECK-NEXT: br label [[LOOP:%.*]]
301+
; CHECK: loop:
302+
; CHECK-NEXT: [[IV2:%.*]] = phi i64 [ [[IV2_NEXT:%.*]], [[LOOP]] ], [ [[BASE]], [[ENTRY:%.*]] ]
303+
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP]] ], [ 0, [[ENTRY]] ]
304+
; CHECK-NEXT: call void @use.i64(i64 [[IV2]])
305+
; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 4
306+
; CHECK-NEXT: [[IV2_NEXT]] = or i64 [[IV_NEXT]], [[BASE]]
307+
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[IV_NEXT]], [[END]]
308+
; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[LOOP]]
309+
; CHECK: exit:
310+
; CHECK-NEXT: ret void
311+
;
312+
entry:
313+
br label %loop
314+
315+
loop:
316+
%iv2 = phi i64 [ %iv2.next, %loop ], [ %base, %entry ]
317+
%iv = phi i64 [ %iv.next, %loop ], [ 0, %entry ]
318+
call void @use.i64(i64 %iv2)
319+
%iv.next = add nuw nsw i64 %iv, 4
320+
%iv2.next = or i64 %iv.next, %base
321+
%cmp = icmp eq i64 %iv.next, %end
322+
br i1 %cmp, label %exit, label %loop
323+
324+
exit:
325+
ret void
326+
}
327+
328+
define void @int_iv_or_disjoint(i64 %base, i64 %end) {
329+
; CHECK-LABEL: define void @int_iv_or_disjoint(
330+
; CHECK-SAME: i64 [[BASE:%.*]], i64 [[END:%.*]]) {
331+
; CHECK-NEXT: entry:
332+
; CHECK-NEXT: br label [[LOOP:%.*]]
333+
; CHECK: loop:
334+
; CHECK-NEXT: [[IV2:%.*]] = phi i64 [ [[IV2_NEXT:%.*]], [[LOOP]] ], [ [[BASE]], [[ENTRY:%.*]] ]
335+
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP]] ], [ 0, [[ENTRY]] ]
336+
; CHECK-NEXT: call void @use.i64(i64 [[IV2]])
337+
; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 4
338+
; CHECK-NEXT: [[IV2_NEXT]] = or disjoint i64 [[IV_NEXT]], [[BASE]]
339+
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[IV_NEXT]], [[END]]
340+
; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[LOOP]]
341+
; CHECK: exit:
342+
; CHECK-NEXT: ret void
343+
;
344+
entry:
345+
br label %loop
346+
347+
loop:
348+
%iv2 = phi i64 [ %iv2.next, %loop ], [ %base, %entry ]
349+
%iv = phi i64 [ %iv.next, %loop ], [ 0, %entry ]
350+
call void @use.i64(i64 %iv2)
351+
%iv.next = add nuw nsw i64 %iv, 4
352+
%iv2.next = or disjoint i64 %iv.next, %base
353+
%cmp = icmp eq i64 %iv.next, %end
354+
br i1 %cmp, label %exit, label %loop
355+
356+
exit:
357+
ret void
358+
}
359+
360+
define void @int_iv_and(i64 %base, i64 %end) {
361+
; CHECK-LABEL: define void @int_iv_and(
362+
; CHECK-SAME: i64 [[BASE:%.*]], i64 [[END:%.*]]) {
363+
; CHECK-NEXT: entry:
364+
; CHECK-NEXT: br label [[LOOP:%.*]]
365+
; CHECK: loop:
366+
; CHECK-NEXT: [[IV2:%.*]] = phi i64 [ [[IV2_NEXT:%.*]], [[LOOP]] ], [ [[BASE]], [[ENTRY:%.*]] ]
367+
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP]] ], [ -1, [[ENTRY]] ]
368+
; CHECK-NEXT: call void @use.i64(i64 [[IV2]])
369+
; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 4
370+
; CHECK-NEXT: [[IV2_NEXT]] = and i64 [[IV_NEXT]], [[BASE]]
371+
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[IV_NEXT]], [[END]]
372+
; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[LOOP]]
373+
; CHECK: exit:
374+
; CHECK-NEXT: ret void
375+
;
376+
entry:
377+
br label %loop
378+
379+
loop:
380+
%iv2 = phi i64 [ %iv2.next, %loop ], [ %base, %entry ]
381+
%iv = phi i64 [ %iv.next, %loop ], [ -1, %entry ]
382+
call void @use.i64(i64 %iv2)
383+
%iv.next = add nuw nsw i64 %iv, 4
384+
%iv2.next = and i64 %iv.next, %base
385+
%cmp = icmp eq i64 %iv.next, %end
386+
br i1 %cmp, label %exit, label %loop
387+
388+
exit:
389+
ret void
390+
}
391+
392+
define void @int_iv_sub(i64 %base, i64 %end) {
393+
; CHECK-LABEL: define void @int_iv_sub(
394+
; CHECK-SAME: i64 [[BASE:%.*]], i64 [[END:%.*]]) {
395+
; CHECK-NEXT: entry:
396+
; CHECK-NEXT: br label [[LOOP:%.*]]
397+
; CHECK: loop:
398+
; CHECK-NEXT: [[IV2:%.*]] = phi i64 [ [[IV2_NEXT:%.*]], [[LOOP]] ], [ [[BASE]], [[ENTRY:%.*]] ]
399+
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP]] ], [ 0, [[ENTRY]] ]
400+
; CHECK-NEXT: call void @use.i64(i64 [[IV2]])
401+
; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 4
402+
; CHECK-NEXT: [[IV2_NEXT]] = sub i64 [[BASE]], [[IV_NEXT]]
403+
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[IV_NEXT]], [[END]]
404+
; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[LOOP]]
405+
; CHECK: exit:
406+
; CHECK-NEXT: ret void
407+
;
408+
entry:
409+
br label %loop
410+
411+
loop:
412+
%iv2 = phi i64 [ %iv2.next, %loop ], [ %base, %entry ]
413+
%iv = phi i64 [ %iv.next, %loop ], [ 0, %entry ]
414+
call void @use.i64(i64 %iv2)
415+
%iv.next = add nuw nsw i64 %iv, 4
416+
%iv2.next = sub i64 %base, %iv.next
417+
%cmp = icmp eq i64 %iv.next, %end
418+
br i1 %cmp, label %exit, label %loop
419+
420+
exit:
421+
ret void
422+
}
423+
424+
define void @int_iv_sub_invalid_order(i64 %base, i64 %end) {
425+
; CHECK-LABEL: define void @int_iv_sub_invalid_order(
426+
; CHECK-SAME: i64 [[BASE:%.*]], i64 [[END:%.*]]) {
427+
; CHECK-NEXT: entry:
428+
; CHECK-NEXT: br label [[LOOP:%.*]]
429+
; CHECK: loop:
430+
; CHECK-NEXT: [[IV2:%.*]] = phi i64 [ [[IV2_NEXT:%.*]], [[LOOP]] ], [ [[BASE]], [[ENTRY:%.*]] ]
431+
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP]] ], [ 0, [[ENTRY]] ]
432+
; CHECK-NEXT: call void @use.i64(i64 [[IV2]])
433+
; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 4
434+
; CHECK-NEXT: [[IV2_NEXT]] = sub i64 [[IV_NEXT]], [[BASE]]
435+
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[IV_NEXT]], [[END]]
436+
; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[LOOP]]
437+
; CHECK: exit:
438+
; CHECK-NEXT: ret void
439+
;
440+
entry:
441+
br label %loop
442+
443+
loop:
444+
%iv2 = phi i64 [ %iv2.next, %loop ], [ %base, %entry ]
445+
%iv = phi i64 [ %iv.next, %loop ], [ 0, %entry ]
446+
call void @use.i64(i64 %iv2)
447+
%iv.next = add nuw nsw i64 %iv, 4
448+
%iv2.next = sub i64 %iv.next, %base
449+
%cmp = icmp eq i64 %iv.next, %end
450+
br i1 %cmp, label %exit, label %loop
451+
452+
exit:
453+
ret void
454+
}
455+
456+
define void @int_iv_add_wrong_start(i64 %base, i64 %end) {
457+
; CHECK-LABEL: define void @int_iv_add_wrong_start(
458+
; CHECK-SAME: i64 [[BASE:%.*]], i64 [[END:%.*]]) {
459+
; CHECK-NEXT: entry:
460+
; CHECK-NEXT: br label [[LOOP:%.*]]
461+
; CHECK: loop:
462+
; CHECK-NEXT: [[IV2:%.*]] = phi i64 [ [[IV2_NEXT:%.*]], [[LOOP]] ], [ [[BASE]], [[ENTRY:%.*]] ]
463+
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP]] ], [ 1, [[ENTRY]] ]
464+
; CHECK-NEXT: call void @use.i64(i64 [[IV2]])
465+
; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 4
466+
; CHECK-NEXT: [[IV2_NEXT]] = add i64 [[IV_NEXT]], [[BASE]]
467+
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[IV_NEXT]], [[END]]
468+
; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[LOOP]]
469+
; CHECK: exit:
470+
; CHECK-NEXT: ret void
471+
;
472+
entry:
473+
br label %loop
474+
475+
loop:
476+
%iv2 = phi i64 [ %iv2.next, %loop ], [ %base, %entry ]
477+
%iv = phi i64 [ %iv.next, %loop ], [ 1, %entry ]
478+
call void @use.i64(i64 %iv2)
479+
%iv.next = add nuw nsw i64 %iv, 4
480+
%iv2.next = add i64 %base, %iv.next
481+
%cmp = icmp eq i64 %iv.next, %end
482+
br i1 %cmp, label %exit, label %loop
483+
484+
exit:
485+
ret void
486+
}
487+
488+
define void @int_iv_and_wrong_start(i64 %base, i64 %end) {
489+
; CHECK-LABEL: define void @int_iv_and_wrong_start(
490+
; CHECK-SAME: i64 [[BASE:%.*]], i64 [[END:%.*]]) {
491+
; CHECK-NEXT: entry:
492+
; CHECK-NEXT: br label [[LOOP:%.*]]
493+
; CHECK: loop:
494+
; CHECK-NEXT: [[IV2:%.*]] = phi i64 [ [[IV2_NEXT:%.*]], [[LOOP]] ], [ [[BASE]], [[ENTRY:%.*]] ]
495+
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP]] ], [ 0, [[ENTRY]] ]
496+
; CHECK-NEXT: call void @use.i64(i64 [[IV2]])
497+
; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 4
498+
; CHECK-NEXT: [[IV2_NEXT]] = and i64 [[IV_NEXT]], [[BASE]]
499+
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[IV_NEXT]], [[END]]
500+
; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[LOOP]]
501+
; CHECK: exit:
502+
; CHECK-NEXT: ret void
503+
;
504+
entry:
505+
br label %loop
506+
507+
loop:
508+
%iv2 = phi i64 [ %iv2.next, %loop ], [ %base, %entry ]
509+
%iv = phi i64 [ %iv.next, %loop ], [ 0, %entry ]
510+
call void @use.i64(i64 %iv2)
511+
%iv.next = add nuw nsw i64 %iv, 4
512+
%iv2.next = and i64 %iv.next, %base
513+
%cmp = icmp eq i64 %iv.next, %end
514+
br i1 %cmp, label %exit, label %loop
515+
516+
exit:
517+
ret void
518+
}
519+
232520
define void @ptr_iv_inbounds(ptr %base, i64 %end) {
233521
; CHECK-LABEL: define void @ptr_iv_inbounds(
234522
; CHECK-SAME: ptr [[BASE:%.*]], i64 [[END:%.*]]) {
@@ -389,38 +677,6 @@ exit:
389677
ret void
390678
}
391679

392-
define void @wrong_start_value(i64 %base, i64 %end) {
393-
; CHECK-LABEL: define void @wrong_start_value(
394-
; CHECK-SAME: i64 [[BASE:%.*]], i64 [[END:%.*]]) {
395-
; CHECK-NEXT: entry:
396-
; CHECK-NEXT: br label [[LOOP:%.*]]
397-
; CHECK: loop:
398-
; CHECK-NEXT: [[IV2:%.*]] = phi i64 [ [[IV2_NEXT:%.*]], [[LOOP]] ], [ [[BASE]], [[ENTRY:%.*]] ]
399-
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP]] ], [ 1, [[ENTRY]] ]
400-
; CHECK-NEXT: call void @use.i64(i64 [[IV2]])
401-
; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 4
402-
; CHECK-NEXT: [[IV2_NEXT]] = add i64 [[IV_NEXT]], [[BASE]]
403-
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[IV_NEXT]], [[END]]
404-
; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[LOOP]]
405-
; CHECK: exit:
406-
; CHECK-NEXT: ret void
407-
;
408-
entry:
409-
br label %loop
410-
411-
loop:
412-
%iv2 = phi i64 [ %iv2.next, %loop ], [ %base, %entry ]
413-
%iv = phi i64 [ %iv.next, %loop ], [ 1, %entry ]
414-
call void @use.i64(i64 %iv2)
415-
%iv.next = add nuw nsw i64 %iv, 4
416-
%iv2.next = add i64 %base, %iv.next
417-
%cmp = icmp eq i64 %iv.next, %end
418-
br i1 %cmp, label %exit, label %loop
419-
420-
exit:
421-
ret void
422-
}
423-
424680
define void @different_loops(i64 %base) {
425681
; CHECK-LABEL: define void @different_loops(
426682
; CHECK-SAME: i64 [[BASE:%.*]]) {

0 commit comments

Comments
 (0)