@@ -417,8 +417,7 @@ mlir::LogicalResult CIRToLLVMCastOpLowering::matchAndRewrite(
417417 case cir::CastKind::int_to_bool: {
418418 mlir::Value llvmSrcVal = adaptor.getOperands ().front ();
419419 mlir::Value zeroInt = rewriter.create <mlir::LLVM::ConstantOp>(
420- castOp.getLoc (), llvmSrcVal.getType (),
421- mlir::IntegerAttr::get (llvmSrcVal.getType (), 0 ));
420+ castOp.getLoc (), llvmSrcVal.getType (), 0 );
422421 rewriter.replaceOpWithNewOp <mlir::LLVM::ICmpOp>(
423422 castOp, mlir::LLVM::ICmpPredicate::ne, llvmSrcVal, zeroInt);
424423 break ;
@@ -630,9 +629,8 @@ mlir::LogicalResult CIRToLLVMPtrStrideOpLowering::matchAndRewrite(
630629 if (rewriteSub) {
631630 index = rewriter.create <mlir::LLVM::SubOp>(
632631 index.getLoc (), index.getType (),
633- rewriter.create <mlir::LLVM::ConstantOp>(
634- index.getLoc (), index.getType (),
635- mlir::IntegerAttr::get (index.getType (), 0 )),
632+ rewriter.create <mlir::LLVM::ConstantOp>(index.getLoc (),
633+ index.getType (), 0 ),
636634 index);
637635 rewriter.eraseOp (sub);
638636 }
@@ -648,8 +646,7 @@ mlir::LogicalResult CIRToLLVMAllocaOpLowering::matchAndRewrite(
648646 mlir::ConversionPatternRewriter &rewriter) const {
649647 assert (!cir::MissingFeatures::opAllocaDynAllocSize ());
650648 mlir::Value size = rewriter.create <mlir::LLVM::ConstantOp>(
651- op.getLoc (), typeConverter->convertType (rewriter.getIndexType ()),
652- rewriter.getIntegerAttr (rewriter.getIndexType (), 1 ));
649+ op.getLoc (), typeConverter->convertType (rewriter.getIndexType ()), 1 );
653650 mlir::Type elementTy =
654651 convertTypeForMemory (*getTypeConverter (), dataLayout, op.getAllocaType ());
655652 mlir::Type resultTy = convertTypeForMemory (*getTypeConverter (), dataLayout,
@@ -1111,18 +1108,16 @@ mlir::LogicalResult CIRToLLVMUnaryOpLowering::matchAndRewrite(
11111108 switch (op.getKind ()) {
11121109 case cir::UnaryOpKind::Inc: {
11131110 assert (!isVector && " ++ not allowed on vector types" );
1114- mlir::LLVM::ConstantOp one = rewriter.create <mlir::LLVM::ConstantOp>(
1115- loc, llvmType, mlir::IntegerAttr::get (llvmType, 1 ));
1111+ auto one = rewriter.create <mlir::LLVM::ConstantOp>(loc, llvmType, 1 );
11161112 rewriter.replaceOpWithNewOp <mlir::LLVM::AddOp>(
11171113 op, llvmType, adaptor.getInput (), one, maybeNSW);
11181114 return mlir::success ();
11191115 }
11201116 case cir::UnaryOpKind::Dec: {
11211117 assert (!isVector && " -- not allowed on vector types" );
1122- mlir::LLVM::ConstantOp one = rewriter.create <mlir::LLVM::ConstantOp>(
1123- loc, llvmType, mlir::IntegerAttr::get (llvmType, 1 ));
1124- rewriter.replaceOpWithNewOp <mlir::LLVM::SubOp>(
1125- op, llvmType, adaptor.getInput (), one, maybeNSW);
1118+ auto one = rewriter.create <mlir::LLVM::ConstantOp>(loc, llvmType, 1 );
1119+ rewriter.replaceOpWithNewOp <mlir::LLVM::SubOp>(op, adaptor.getInput (),
1120+ one, maybeNSW);
11261121 return mlir::success ();
11271122 }
11281123 case cir::UnaryOpKind::Plus:
@@ -1133,10 +1128,9 @@ mlir::LogicalResult CIRToLLVMUnaryOpLowering::matchAndRewrite(
11331128 if (isVector)
11341129 zero = rewriter.create <mlir::LLVM::ZeroOp>(loc, llvmType);
11351130 else
1136- zero = rewriter.create <mlir::LLVM::ConstantOp>(
1137- loc, llvmType, mlir::IntegerAttr::get (llvmType, 0 ));
1131+ zero = rewriter.create <mlir::LLVM::ConstantOp>(loc, llvmType, 0 );
11381132 rewriter.replaceOpWithNewOp <mlir::LLVM::SubOp>(
1139- op, llvmType, zero, adaptor.getInput (), maybeNSW);
1133+ op, zero, adaptor.getInput (), maybeNSW);
11401134 return mlir::success ();
11411135 }
11421136 case cir::UnaryOpKind::Not: {
@@ -1150,11 +1144,10 @@ mlir::LogicalResult CIRToLLVMUnaryOpLowering::matchAndRewrite(
11501144 minusOne =
11511145 rewriter.create <mlir::LLVM::ConstantOp>(loc, llvmType, denseVec);
11521146 } else {
1153- minusOne = rewriter.create <mlir::LLVM::ConstantOp>(
1154- loc, llvmType, mlir::IntegerAttr::get (llvmType, -1 ));
1147+ minusOne = rewriter.create <mlir::LLVM::ConstantOp>(loc, llvmType, -1 );
11551148 }
1156- rewriter.replaceOpWithNewOp <mlir::LLVM::XOrOp>(
1157- op, llvmType, adaptor. getInput (), minusOne);
1149+ rewriter.replaceOpWithNewOp <mlir::LLVM::XOrOp>(op, adaptor. getInput (),
1150+ minusOne);
11581151 return mlir::success ();
11591152 }
11601153 }
@@ -1206,10 +1199,9 @@ mlir::LogicalResult CIRToLLVMUnaryOpLowering::matchAndRewrite(
12061199 return op.emitError () << " Unsupported unary operation on boolean type" ;
12071200 case cir::UnaryOpKind::Not: {
12081201 assert (!isVector && " NYI: op! on vector mask" );
1209- mlir::LLVM::ConstantOp one = rewriter.create <mlir::LLVM::ConstantOp>(
1210- loc, llvmType, rewriter.getIntegerAttr (llvmType, 1 ));
1211- rewriter.replaceOpWithNewOp <mlir::LLVM::XOrOp>(op, llvmType,
1212- adaptor.getInput (), one);
1202+ auto one = rewriter.create <mlir::LLVM::ConstantOp>(loc, llvmType, 1 );
1203+ rewriter.replaceOpWithNewOp <mlir::LLVM::XOrOp>(op, adaptor.getInput (),
1204+ one);
12131205 return mlir::success ();
12141206 }
12151207 }
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