Skip to content

Commit c8b4086

Browse files
broxigarchenbroxigarchen
authored
[AMDGPU][True16][CodeGen] test fix for uaddsat/usubsat true16 selection (#128784)
This is a NFC change. Update the test file and fix the build #128233 is causing a build issue. This is caused by PR #127945 being merged while the 128233 is pending for review.
1 parent 2db8386 commit c8b4086

File tree

5 files changed

+66
-63
lines changed

5 files changed

+66
-63
lines changed

‎llvm/test/CodeGen/AMDGPU/fmed3.ll‎

Lines changed: 4 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -7582,7 +7582,7 @@ define amdgpu_kernel void @v_test_nnan_input_fmed3_r_i_i_f16(ptr addrspace(1) %o
75827582
; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
75837583
; GFX11-GISEL-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 1, v0
75847584
; GFX11-GISEL-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
7585-
; GFX11-GISEL-TRUE16-NEXT: global_load_u16 v0, v1, s[2:3]
7585+
; GFX11-GISEL-TRUE16-NEXT: global_load_d16_b16 v0, v1, s[2:3]
75867586
; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0)
75877587
; GFX11-GISEL-TRUE16-NEXT: v_add_f16_e32 v0.l, 1.0, v0.l
75887588
; GFX11-GISEL-TRUE16-NEXT: v_med3_f16 v0.l, v0.l, 2.0, 4.0
@@ -7837,16 +7837,13 @@ define amdgpu_kernel void @v_nnan_inputs_med3_f16_pat0(ptr addrspace(1) %out, pt
78377837
; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
78387838
; GFX11-GISEL-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 1, v0
78397839
; GFX11-GISEL-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
7840-
; GFX11-GISEL-TRUE16-NEXT: global_load_u16 v0, v2, s[2:3] glc dlc
7840+
; GFX11-GISEL-TRUE16-NEXT: global_load_d16_b16 v0, v2, s[2:3] glc dlc
78417841
; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0)
7842-
; GFX11-GISEL-TRUE16-NEXT: global_load_u16 v1, v2, s[4:5] glc dlc
7842+
; GFX11-GISEL-TRUE16-NEXT: global_load_d16_hi_b16 v0, v2, s[4:5] glc dlc
78437843
; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0)
7844-
; GFX11-GISEL-TRUE16-NEXT: global_load_u16 v3, v2, s[6:7] glc dlc
7844+
; GFX11-GISEL-TRUE16-NEXT: global_load_d16_b16 v1, v2, s[6:7] glc dlc
78457845
; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0)
78467846
; GFX11-GISEL-TRUE16-NEXT: v_add_f16_e32 v0.l, 1.0, v0.l
7847-
; GFX11-GISEL-TRUE16-NEXT: v_mov_b16_e32 v0.h, v1.l
7848-
; GFX11-GISEL-TRUE16-NEXT: v_mov_b16_e32 v1.l, v3.l
7849-
; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
78507847
; GFX11-GISEL-TRUE16-NEXT: v_add_f16_e32 v0.h, 2.0, v0.h
78517848
; GFX11-GISEL-TRUE16-NEXT: v_add_f16_e32 v1.l, 4.0, v1.l
78527849
; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)

‎llvm/test/CodeGen/AMDGPU/minimummaximum.ll‎

Lines changed: 23 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -181,17 +181,29 @@ define amdgpu_ps void @s_test_minmax_f16(half inreg %a, half inreg %b, half inre
181181
; SDAG-FAKE16-NEXT: global_store_b16 v0, v1, s[4:5]
182182
; SDAG-FAKE16-NEXT: s_endpgm
183183
;
184-
; GISEL-LABEL: s_test_minmax_f16:
185-
; GISEL: ; %bb.0:
186-
; GISEL-NEXT: s_maximum_f16 s0, s0, s1
187-
; GISEL-NEXT: s_mov_b32 s6, s3
188-
; GISEL-NEXT: s_mov_b32 s7, s4
189-
; GISEL-NEXT: v_mov_b32_e32 v1, 0
190-
; GISEL-NEXT: s_minimum_f16 s0, s0, s2
191-
; GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
192-
; GISEL-NEXT: v_mov_b32_e32 v0, s0
193-
; GISEL-NEXT: global_store_b16 v1, v0, s[6:7]
194-
; GISEL-NEXT: s_endpgm
184+
; GISEL-TRUE16-LABEL: s_test_minmax_f16:
185+
; GISEL-TRUE16: ; %bb.0:
186+
; GISEL-TRUE16-NEXT: s_maximum_f16 s0, s0, s1
187+
; GISEL-TRUE16-NEXT: v_mov_b32_e32 v1, 0
188+
; GISEL-TRUE16-NEXT: s_mov_b32 s6, s3
189+
; GISEL-TRUE16-NEXT: s_mov_b32 s7, s4
190+
; GISEL-TRUE16-NEXT: s_minimum_f16 s0, s0, s2
191+
; GISEL-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
192+
; GISEL-TRUE16-NEXT: v_mov_b16_e32 v0.l, s0
193+
; GISEL-TRUE16-NEXT: global_store_b16 v1, v0, s[6:7]
194+
; GISEL-TRUE16-NEXT: s_endpgm
195+
;
196+
; GISEL-FAKE16-LABEL: s_test_minmax_f16:
197+
; GISEL-FAKE16: ; %bb.0:
198+
; GISEL-FAKE16-NEXT: s_maximum_f16 s0, s0, s1
199+
; GISEL-FAKE16-NEXT: s_mov_b32 s6, s3
200+
; GISEL-FAKE16-NEXT: s_mov_b32 s7, s4
201+
; GISEL-FAKE16-NEXT: v_mov_b32_e32 v1, 0
202+
; GISEL-FAKE16-NEXT: s_minimum_f16 s0, s0, s2
203+
; GISEL-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
204+
; GISEL-FAKE16-NEXT: v_mov_b32_e32 v0, s0
205+
; GISEL-FAKE16-NEXT: global_store_b16 v1, v0, s[6:7]
206+
; GISEL-FAKE16-NEXT: s_endpgm
195207
%smax = call half @llvm.maximum.f16(half %a, half %b)
196208
%sminmax = call half @llvm.minimum.f16(half %smax, half %c)
197209
store half %sminmax, ptr addrspace(1) %out

‎llvm/test/CodeGen/AMDGPU/minmax.ll‎

Lines changed: 21 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -577,16 +577,27 @@ define amdgpu_ps void @s_test_minmax_f16_ieee_false(half inreg %a, half inreg %b
577577
; SDAG-GFX12-FAKE16-NEXT: global_store_b16 v1, v0, s[4:5]
578578
; SDAG-GFX12-FAKE16-NEXT: s_endpgm
579579
;
580-
; GISEL-GFX12-LABEL: s_test_minmax_f16_ieee_false:
581-
; GISEL-GFX12: ; %bb.0:
582-
; GISEL-GFX12-NEXT: s_max_num_f16 s0, s0, s1
583-
; GISEL-GFX12-NEXT: s_mov_b32 s6, s3
584-
; GISEL-GFX12-NEXT: s_mov_b32 s7, s4
585-
; GISEL-GFX12-NEXT: v_mov_b32_e32 v1, 0
586-
; GISEL-GFX12-NEXT: s_min_num_f16 s0, s0, s2
587-
; GISEL-GFX12-NEXT: v_mov_b32_e32 v0, s0
588-
; GISEL-GFX12-NEXT: global_store_b16 v1, v0, s[6:7]
589-
; GISEL-GFX12-NEXT: s_endpgm
580+
; GISEL-GFX12-TRUE16-LABEL: s_test_minmax_f16_ieee_false:
581+
; GISEL-GFX12-TRUE16: ; %bb.0:
582+
; GISEL-GFX12-TRUE16-NEXT: s_max_num_f16 s0, s0, s1
583+
; GISEL-GFX12-TRUE16-NEXT: v_mov_b32_e32 v1, 0
584+
; GISEL-GFX12-TRUE16-NEXT: s_mov_b32 s6, s3
585+
; GISEL-GFX12-TRUE16-NEXT: s_mov_b32 s7, s4
586+
; GISEL-GFX12-TRUE16-NEXT: s_min_num_f16 s0, s0, s2
587+
; GISEL-GFX12-TRUE16-NEXT: v_mov_b16_e32 v0.l, s0
588+
; GISEL-GFX12-TRUE16-NEXT: global_store_b16 v1, v0, s[6:7]
589+
; GISEL-GFX12-TRUE16-NEXT: s_endpgm
590+
;
591+
; GISEL-GFX12-FAKE16-LABEL: s_test_minmax_f16_ieee_false:
592+
; GISEL-GFX12-FAKE16: ; %bb.0:
593+
; GISEL-GFX12-FAKE16-NEXT: s_max_num_f16 s0, s0, s1
594+
; GISEL-GFX12-FAKE16-NEXT: s_mov_b32 s6, s3
595+
; GISEL-GFX12-FAKE16-NEXT: s_mov_b32 s7, s4
596+
; GISEL-GFX12-FAKE16-NEXT: v_mov_b32_e32 v1, 0
597+
; GISEL-GFX12-FAKE16-NEXT: s_min_num_f16 s0, s0, s2
598+
; GISEL-GFX12-FAKE16-NEXT: v_mov_b32_e32 v0, s0
599+
; GISEL-GFX12-FAKE16-NEXT: global_store_b16 v1, v0, s[6:7]
600+
; GISEL-GFX12-FAKE16-NEXT: s_endpgm
590601
%smax = call half @llvm.maxnum.f16(half %a, half %b)
591602
%sminmax = call half @llvm.minnum.f16(half %smax, half %c)
592603
store half %sminmax, ptr addrspace(1) %out

‎llvm/test/CodeGen/AMDGPU/shrink-add-sub-constant.ll‎

Lines changed: 6 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -1366,7 +1366,7 @@ define amdgpu_kernel void @v_test_i16_x_sub_64(ptr addrspace(1) %out, ptr addrsp
13661366
; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
13671367
; GFX11-GISEL-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 1, v0
13681368
; GFX11-GISEL-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
1369-
; GFX11-GISEL-TRUE16-NEXT: global_load_u16 v0, v1, s[2:3]
1369+
; GFX11-GISEL-TRUE16-NEXT: global_load_d16_b16 v0, v1, s[2:3]
13701370
; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0)
13711371
; GFX11-GISEL-TRUE16-NEXT: v_add_nc_u16 v0.l, 0xffc0, v0.l
13721372
; GFX11-GISEL-TRUE16-NEXT: global_store_b16 v1, v0, s[0:1]
@@ -1559,7 +1559,7 @@ define amdgpu_kernel void @v_test_i16_x_sub_64_zext_to_i32(ptr addrspace(1) %out
15591559
; GFX11-GISEL-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 1, v1
15601560
; GFX11-GISEL-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 2, v1
15611561
; GFX11-GISEL-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
1562-
; GFX11-GISEL-TRUE16-NEXT: global_load_u16 v0, v0, s[2:3]
1562+
; GFX11-GISEL-TRUE16-NEXT: global_load_d16_b16 v0, v0, s[2:3]
15631563
; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0)
15641564
; GFX11-GISEL-TRUE16-NEXT: v_add_nc_u16 v0.l, 0xffc0, v0.l
15651565
; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -1799,21 +1799,16 @@ define amdgpu_kernel void @v_test_i16_x_sub_64_multi_use(ptr addrspace(1) %out,
17991799
; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
18001800
; GFX11-GISEL-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 1, v0
18011801
; GFX11-GISEL-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
1802-
; GFX11-GISEL-TRUE16-NEXT: global_load_u16 v0, v1, s[2:3] glc dlc
1802+
; GFX11-GISEL-TRUE16-NEXT: global_load_d16_b16 v0, v1, s[2:3] glc dlc
18031803
; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0)
1804-
; GFX11-GISEL-TRUE16-NEXT: global_load_u16 v2, v1, s[2:3] glc dlc
1804+
; GFX11-GISEL-TRUE16-NEXT: global_load_d16_hi_b16 v0, v1, s[2:3] glc dlc
18051805
; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0)
18061806
; GFX11-GISEL-TRUE16-NEXT: v_add_nc_u16 v0.l, 0xffc0, v0.l
1807-
; GFX11-GISEL-TRUE16-NEXT: v_mov_b16_e32 v0.h, v2.l
1808-
; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
1809-
; GFX11-GISEL-TRUE16-NEXT: v_mov_b16_e32 v2.l, v0.l
18101807
; GFX11-GISEL-TRUE16-NEXT: v_add_nc_u16 v0.h, 0xffc0, v0.h
1811-
; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
1812-
; GFX11-GISEL-TRUE16-NEXT: v_mov_b16_e32 v0.l, v0.h
1813-
; GFX11-GISEL-TRUE16-NEXT: global_store_b16 v1, v2, s[0:1] dlc
1814-
; GFX11-GISEL-TRUE16-NEXT: s_waitcnt_vscnt null, 0x0
18151808
; GFX11-GISEL-TRUE16-NEXT: global_store_b16 v1, v0, s[0:1] dlc
18161809
; GFX11-GISEL-TRUE16-NEXT: s_waitcnt_vscnt null, 0x0
1810+
; GFX11-GISEL-TRUE16-NEXT: global_store_d16_hi_b16 v1, v0, s[0:1] dlc
1811+
; GFX11-GISEL-TRUE16-NEXT: s_waitcnt_vscnt null, 0x0
18171812
; GFX11-GISEL-TRUE16-NEXT: s_endpgm
18181813
;
18191814
; GFX11-GISEL-FAKE16-LABEL: v_test_i16_x_sub_64_multi_use:

‎llvm/test/CodeGen/AMDGPU/v_pack.ll‎

Lines changed: 12 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -108,15 +108,12 @@ define amdgpu_kernel void @v_pack_b32_v2f16(ptr addrspace(1) %in0, ptr addrspace
108108
; GFX11-GISEL-REAL16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
109109
; GFX11-GISEL-REAL16-NEXT: v_and_b32_e32 v0, 0x3ff, v0
110110
; GFX11-GISEL-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_1)
111-
; GFX11-GISEL-REAL16-NEXT: v_lshlrev_b32_e32 v0, 1, v0
111+
; GFX11-GISEL-REAL16-NEXT: v_lshlrev_b32_e32 v1, 1, v0
112112
; GFX11-GISEL-REAL16-NEXT: s_waitcnt lgkmcnt(0)
113-
; GFX11-GISEL-REAL16-NEXT: global_load_u16 v1, v0, s[0:1] glc dlc
113+
; GFX11-GISEL-REAL16-NEXT: global_load_d16_b16 v0, v1, s[0:1] glc dlc
114114
; GFX11-GISEL-REAL16-NEXT: s_waitcnt vmcnt(0)
115-
; GFX11-GISEL-REAL16-NEXT: global_load_u16 v2, v0, s[2:3] glc dlc
115+
; GFX11-GISEL-REAL16-NEXT: global_load_d16_hi_b16 v0, v1, s[2:3] glc dlc
116116
; GFX11-GISEL-REAL16-NEXT: s_waitcnt vmcnt(0)
117-
; GFX11-GISEL-REAL16-NEXT: v_mov_b16_e32 v0.l, v1.l
118-
; GFX11-GISEL-REAL16-NEXT: v_mov_b16_e32 v0.h, v2.l
119-
; GFX11-GISEL-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
120117
; GFX11-GISEL-REAL16-NEXT: v_add_f16_e32 v0.l, 2.0, v0.l
121118
; GFX11-GISEL-REAL16-NEXT: v_add_f16_e32 v0.h, 2.0, v0.h
122119
; GFX11-GISEL-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -240,15 +237,12 @@ define amdgpu_kernel void @v_pack_b32_v2f16_sub(ptr addrspace(1) %in0, ptr addrs
240237
; GFX11-GISEL-REAL16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
241238
; GFX11-GISEL-REAL16-NEXT: v_and_b32_e32 v0, 0x3ff, v0
242239
; GFX11-GISEL-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_1)
243-
; GFX11-GISEL-REAL16-NEXT: v_lshlrev_b32_e32 v0, 1, v0
240+
; GFX11-GISEL-REAL16-NEXT: v_lshlrev_b32_e32 v1, 1, v0
244241
; GFX11-GISEL-REAL16-NEXT: s_waitcnt lgkmcnt(0)
245-
; GFX11-GISEL-REAL16-NEXT: global_load_u16 v1, v0, s[0:1] glc dlc
242+
; GFX11-GISEL-REAL16-NEXT: global_load_d16_b16 v0, v1, s[0:1] glc dlc
246243
; GFX11-GISEL-REAL16-NEXT: s_waitcnt vmcnt(0)
247-
; GFX11-GISEL-REAL16-NEXT: global_load_u16 v2, v0, s[2:3] glc dlc
244+
; GFX11-GISEL-REAL16-NEXT: global_load_d16_hi_b16 v0, v1, s[2:3] glc dlc
248245
; GFX11-GISEL-REAL16-NEXT: s_waitcnt vmcnt(0)
249-
; GFX11-GISEL-REAL16-NEXT: v_mov_b16_e32 v0.l, v1.l
250-
; GFX11-GISEL-REAL16-NEXT: v_mov_b16_e32 v0.h, v2.l
251-
; GFX11-GISEL-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
252246
; GFX11-GISEL-REAL16-NEXT: v_subrev_f16_e32 v0.l, 2.0, v0.l
253247
; GFX11-GISEL-REAL16-NEXT: v_add_f16_e32 v0.h, 2.0, v0.h
254248
; GFX11-GISEL-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -486,15 +480,12 @@ define amdgpu_kernel void @v_pack_b32.fabs(ptr addrspace(1) %in0, ptr addrspace(
486480
; GFX11-GISEL-REAL16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
487481
; GFX11-GISEL-REAL16-NEXT: v_and_b32_e32 v0, 0x3ff, v0
488482
; GFX11-GISEL-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_1)
489-
; GFX11-GISEL-REAL16-NEXT: v_lshlrev_b32_e32 v0, 1, v0
483+
; GFX11-GISEL-REAL16-NEXT: v_lshlrev_b32_e32 v1, 1, v0
490484
; GFX11-GISEL-REAL16-NEXT: s_waitcnt lgkmcnt(0)
491-
; GFX11-GISEL-REAL16-NEXT: global_load_u16 v1, v0, s[0:1] glc dlc
485+
; GFX11-GISEL-REAL16-NEXT: global_load_d16_b16 v0, v1, s[0:1] glc dlc
492486
; GFX11-GISEL-REAL16-NEXT: s_waitcnt vmcnt(0)
493-
; GFX11-GISEL-REAL16-NEXT: global_load_u16 v2, v0, s[2:3] glc dlc
487+
; GFX11-GISEL-REAL16-NEXT: global_load_d16_hi_b16 v0, v1, s[2:3] glc dlc
494488
; GFX11-GISEL-REAL16-NEXT: s_waitcnt vmcnt(0)
495-
; GFX11-GISEL-REAL16-NEXT: v_mov_b16_e32 v0.l, v1.l
496-
; GFX11-GISEL-REAL16-NEXT: v_mov_b16_e32 v0.h, v2.l
497-
; GFX11-GISEL-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
498489
; GFX11-GISEL-REAL16-NEXT: v_add_f16_e32 v0.l, 2.0, v0.l
499490
; GFX11-GISEL-REAL16-NEXT: v_add_f16_e32 v0.h, 2.0, v0.h
500491
; GFX11-GISEL-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -620,15 +611,12 @@ define amdgpu_kernel void @v_pack_b32.fneg(ptr addrspace(1) %in0, ptr addrspace(
620611
; GFX11-GISEL-REAL16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
621612
; GFX11-GISEL-REAL16-NEXT: v_and_b32_e32 v0, 0x3ff, v0
622613
; GFX11-GISEL-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_1)
623-
; GFX11-GISEL-REAL16-NEXT: v_lshlrev_b32_e32 v0, 1, v0
614+
; GFX11-GISEL-REAL16-NEXT: v_lshlrev_b32_e32 v1, 1, v0
624615
; GFX11-GISEL-REAL16-NEXT: s_waitcnt lgkmcnt(0)
625-
; GFX11-GISEL-REAL16-NEXT: global_load_u16 v1, v0, s[0:1] glc dlc
616+
; GFX11-GISEL-REAL16-NEXT: global_load_d16_b16 v0, v1, s[0:1] glc dlc
626617
; GFX11-GISEL-REAL16-NEXT: s_waitcnt vmcnt(0)
627-
; GFX11-GISEL-REAL16-NEXT: global_load_u16 v2, v0, s[2:3] glc dlc
618+
; GFX11-GISEL-REAL16-NEXT: global_load_d16_hi_b16 v0, v1, s[2:3] glc dlc
628619
; GFX11-GISEL-REAL16-NEXT: s_waitcnt vmcnt(0)
629-
; GFX11-GISEL-REAL16-NEXT: v_mov_b16_e32 v0.l, v1.l
630-
; GFX11-GISEL-REAL16-NEXT: v_mov_b16_e32 v0.h, v2.l
631-
; GFX11-GISEL-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
632620
; GFX11-GISEL-REAL16-NEXT: v_add_f16_e32 v0.l, 2.0, v0.l
633621
; GFX11-GISEL-REAL16-NEXT: v_add_f16_e32 v0.h, 2.0, v0.h
634622
; GFX11-GISEL-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_1)

0 commit comments

Comments
 (0)