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qfew more; something odd
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11 files changed

+27
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‎llvm/test/Assembler/bfloat.ll‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -37,25 +37,25 @@ define float @check_bfloat_convert() {
3737
ret float %tmp
3838
}
3939

40-
; ASSEM-DISASS-LABEL @snan_bfloat
40+
; ASSEM-DISASS-LABEL: @snan_bfloat
4141
define bfloat @snan_bfloat() {
4242
; ASSEM-DISASS: ret bfloat 0xR7F81
4343
ret bfloat 0xR7F81
4444
}
4545

46-
; ASSEM-DISASS-LABEL @qnan_bfloat
46+
; ASSEM-DISASS-LABEL: @qnan_bfloat
4747
define bfloat @qnan_bfloat() {
4848
; ASSEM-DISASS: ret bfloat 0xR7FC0
4949
ret bfloat 0xR7FC0
5050
}
5151

52-
; ASSEM-DISASS-LABEL @pos_inf_bfloat
52+
; ASSEM-DISASS-LABEL: @pos_inf_bfloat
5353
define bfloat @pos_inf_bfloat() {
5454
; ASSEM-DISASS: ret bfloat 0xR7F80
5555
ret bfloat 0xR7F80
5656
}
5757

58-
; ASSEM-DISASS-LABEL @neg_inf_bfloat
58+
; ASSEM-DISASS-LABEL: @neg_inf_bfloat
5959
define bfloat @neg_inf_bfloat() {
6060
; ASSEM-DISASS: ret bfloat 0xRFF80
6161
ret bfloat 0xRFF80

‎llvm/test/CodeGen/AArch64/arm64ec-entry-thunks.ll‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,7 @@
11
; RUN: llc -mtriple=arm64ec-pc-windows-msvc < %s | FileCheck %s
22

33
define void @no_op() nounwind {
4-
; CHECK-LABEL .def $ientry_thunk$cdecl$v$v;
4+
; CHECK-LABEL: .def $ientry_thunk$cdecl$v$v;
55
; CHECK: .section .wowthk$aa,"xr",discard,$ientry_thunk$cdecl$v$v
66
; CHECK: // %bb.0:
77
; CHECK-NEXT: stp q6, q7, [sp, #-176]! // 32-byte Folded Spill

‎llvm/test/CodeGen/AArch64/speculation-hardening-sls.ll‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -192,7 +192,7 @@ entry:
192192
; CHECK: .Lfunc_end
193193
}
194194

195-
; HARDEN-label: __llvm_slsblr_thunk_x0:
195+
; HARDEN-LABEL: __llvm_slsblr_thunk_x0:
196196
; HARDEN: mov x16, x0
197197
; HARDEN: br x16
198198
; ISBDSB-NEXT: dsb sy
@@ -208,7 +208,7 @@ entry:
208208
; HARDEN-COMDAT-OFF-NOT: .hidden __llvm_slsblr_thunk_x19
209209
; HARDEN-COMDAT-OFF-NOT: .weak __llvm_slsblr_thunk_x19
210210
; HARDEN-COMDAT-OFF: .type __llvm_slsblr_thunk_x19,@function
211-
; HARDEN-label: __llvm_slsblr_thunk_x19:
211+
; HARDEN-LABEL: __llvm_slsblr_thunk_x19:
212212
; HARDEN: mov x16, x19
213213
; HARDEN: br x16
214214
; ISBDSB-NEXT: dsb sy

‎llvm/test/CodeGen/ARM/speculation-hardening-sls.ll‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -248,7 +248,7 @@ entry:
248248
; HARDEN-COMDAT-OFF-NOT: .hidden {{__llvm_slsblr_thunk_(arm|thumb)_r5}}
249249
; HARDEN-COMDAT-OFF-NOT: .weak {{__llvm_slsblr_thunk_(arm|thumb)_r5}}
250250
; HARDEN-COMDAT-OFF: .type {{__llvm_slsblr_thunk_(arm|thumb)_r5}},%function
251-
; HARDEN-label: {{__llvm_slsblr_thunk_(arm|thumb)_r5}}:
251+
; HARDEN-LABEL: {{__llvm_slsblr_thunk_(arm|thumb)_r5}}:
252252
; HARDEN: bx r5
253253
; ISBDSB-NEXT: dsb sy
254254
; ISBDSB-NEXT: isb

‎llvm/test/CodeGen/NVPTX/idioms.ll‎

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -42,7 +42,7 @@ define %struct.S16 @i32_to_2xi16(i32 noundef %in) {
4242
%high = trunc i32 %high32 to i16
4343
; CHECK: ld.param.u32 %[[R32:r[0-9]+]], [i32_to_2xi16_param_0];
4444
; CHECK-DAG: cvt.u16.u32 %rs{{[0-9+]}}, %[[R32]];
45-
; CHECK-DAG mov.b32 {tmp, %rs{{[0-9+]}}}, %[[R32]];
45+
; CHECK-DAG: mov.b32 {tmp, %rs{{[0-9+]}}}, %[[R32]];
4646
%s1 = insertvalue %struct.S16 poison, i16 %low, 0
4747
%s = insertvalue %struct.S16 %s1, i16 %high, 1
4848
ret %struct.S16 %s
@@ -56,7 +56,7 @@ define %struct.S16 @i32_to_2xi16_lh(i32 noundef %in) {
5656
%low = trunc i32 %in to i16
5757
; CHECK: ld.param.u32 %[[R32:r[0-9]+]], [i32_to_2xi16_lh_param_0];
5858
; CHECK-DAG: cvt.u16.u32 %rs{{[0-9+]}}, %[[R32]];
59-
; CHECK-DAG mov.b32 {tmp, %rs{{[0-9+]}}}, %[[R32]];
59+
; CHECK-DAG: mov.b32 {tmp, %rs{{[0-9+]}}}, %[[R32]];
6060
%s1 = insertvalue %struct.S16 poison, i16 %low, 0
6161
%s = insertvalue %struct.S16 %s1, i16 %high, 1
6262
ret %struct.S16 %s
@@ -84,7 +84,7 @@ define %struct.S32 @i64_to_2xi32(i64 noundef %in) {
8484
%high = trunc i64 %high64 to i32
8585
; CHECK: ld.param.u64 %[[R64:rd[0-9]+]], [i64_to_2xi32_param_0];
8686
; CHECK-DAG: cvt.u32.u64 %r{{[0-9+]}}, %[[R64]];
87-
; CHECK-DAG mov.b64 {tmp, %r{{[0-9+]}}}, %[[R64]];
87+
; CHECK-DAG: mov.b64 {tmp, %r{{[0-9+]}}}, %[[R64]];
8888
%s1 = insertvalue %struct.S32 poison, i32 %low, 0
8989
%s = insertvalue %struct.S32 %s1, i32 %high, 1
9090
ret %struct.S32 %s
@@ -114,8 +114,8 @@ define %struct.S16 @i32_to_2xi16_shr(i32 noundef %i){
114114
%h = trunc i32 %h32 to i16
115115
; CHECK: ld.param.u32 %[[R32:r[0-9]+]], [i32_to_2xi16_shr_param_0];
116116
; CHECK: shr.s32 %[[R32H:r[0-9]+]], %[[R32]], 16;
117-
; CHECK-DAG mov.b32 {tmp, %rs{{[0-9+]}}}, %[[R32]];
118-
; CHECK-DAG mov.b32 {tmp, %rs{{[0-9+]}}}, %[[R32H]];
117+
; CHECK-DAG: mov.b32 {tmp, %rs{{[0-9+]}}}, %[[R32]];
118+
; CHECK-DAG: mov.b32 {tmp, %rs{{[0-9+]}}}, %[[R32H]];
119119
%s0 = insertvalue %struct.S16 poison, i16 %l, 0
120120
%s1 = insertvalue %struct.S16 %s0, i16 %h, 1
121121
ret %struct.S16 %s1

‎llvm/test/CodeGen/SPARC/inlineasm.ll‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -144,7 +144,7 @@ entry:
144144
ret void
145145
}
146146

147-
; CHECK-label:test_twinword
147+
; CHECK-LABEL:test_twinword
148148
; CHECK: rd %asr5, %i1
149149
; CHECK: srlx %i1, 32, %i0
150150

‎llvm/test/DebugInfo/MIR/InstrRef/single-assign-propagation.mir‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -55,11 +55,11 @@
5555
## to bb.3, but not into bb.4 because of the intervening out-of-scope block.
5656
## Disabled actual testing of this because it's just for comparison purposes.
5757
#
58-
# varloc-label: bb.1:
58+
# varloc-LABEL: bb.1:
5959
# varloc: DBG_VALUE
60-
# varloc-label: bb.2:
60+
# varloc-LABEL: bb.2:
6161
## No location here because it's out-of-scope.
62-
# varloc-label: bb.3:
62+
# varloc-LABEL: bb.3:
6363
# varloc: DBG_VALUE
6464
#
6565
## Common tail for 'test2' -- this is checking that the assignment of undef or

‎llvm/test/MC/RISCV/zicfiss-valid.s‎

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -44,14 +44,14 @@ sspush x1
4444
# CHECK-NO-EXT: error: instruction requires the following: 'Zicfiss' (Shadow stack)
4545
sspush ra
4646

47-
# check-asm-and-obj: sspush t0
48-
# check-asm: encoding: [0x73,0x40,0x50,0xce]
49-
# check-no-ext: error: instruction requires the following: 'Zicfiss' (Shadow stack)
47+
# CHECK-ASM-AND-OBJ: sspush t0
48+
# CHECK-ASM: encoding: [0x73,0x40,0x50,0xce]
49+
# CHECK-NO-EXT: error: instruction requires the following: 'Zicfiss' (Shadow stack)
5050
sspush x5
5151

52-
# check-asm-and-obj: sspush t0
53-
# check-asm: encoding: [0x73,0x40,0x50,0xce]
54-
# check-no-ext: error: instruction requires the following: 'Zicfiss' (Shadow stack)
52+
# CHECK-ASM-AND-OBJ: sspush t0
53+
# CHECK-ASM: encoding: [0x73,0x40,0x50,0xce]
54+
# CHECK-NO-EXT: error: instruction requires the following: 'Zicfiss' (Shadow stack)
5555
sspush t0
5656

5757
# CHECK-ASM-AND-OBJ: ssrdp ra

‎llvm/test/Transforms/SampleProfile/pseudo-probe-selectionDAG.ll‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -10,7 +10,7 @@ entry:
1010

1111
if.end: ; preds = %entry
1212
;; Check pseudo probes are next to each other at the beginning of this block.
13-
; IR-label: if.end
13+
; IR-LABEL: if.end
1414
; IR: call void @llvm.pseudoprobe(i64 5116412291814990879, i64 1, i32 0, i64 -1)
1515
; IR: call void @llvm.pseudoprobe(i64 5116412291814990879, i64 3, i32 0, i64 -1)
1616
call void @llvm.pseudoprobe(i64 5116412291814990879, i64 1, i32 0, i64 -1)
@@ -19,7 +19,7 @@ if.end: ; preds = %entry
1919
%2 = and i16 %1, 16
2020
%3 = icmp eq i16 %2, 0
2121
;; Check the load-and-cmp sequence is fold into a test instruction.
22-
; MIR-label: bb.1.if.end
22+
; MIR-LABEL: bb.1.if.end
2323
; MIR: %[[#REG:]]:gr64 = IMPLICIT_DEF
2424
; MIR: TEST8mi killed %[[#REG]], 1, $noreg, 0, $noreg, 16
2525
; MIR: JCC_1

‎llvm/test/tools/llvm-objdump/ELF/ARM/v5te-subarch.s‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -5,6 +5,6 @@
55
strd:
66
strd r0, r1, [r2, +r3]
77

8-
@ CHECK-LABEL strd
8+
@ CHECK-LABEL: strd
99
@ CHECK: e18200f3 strd r0, r1, [r2, r3]
1010

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