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dyungdyung
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Revert "[SCCP] Use range info to prove AddInst has NUW flag."
This reverts commit de122cb. This change causes assertion failures in many of our internal tests. I have filed #60280 for this issue.
1 parent c7575fc commit c9401f2

14 files changed

+72
-95
lines changed

‎llvm/lib/Transforms/Utils/SCCPSolver.cpp

Lines changed: 13 additions & 36 deletions
Original file line numberDiff line numberDiff line change
@@ -41,14 +41,6 @@ static ValueLatticeElement::MergeOptions getMaxWidenStepsOpts() {
4141
MaxNumRangeExtensions);
4242
}
4343

44-
static ConstantRange getConstantRange(const ValueLatticeElement &LV, Type *Ty,
45-
bool UndefAllowed = true) {
46-
assert(Ty->isIntOrIntVectorTy() && "Should be int or int vector");
47-
if (LV.isConstantRange(UndefAllowed))
48-
return LV.getConstantRange();
49-
return ConstantRange::getFull(Ty->getScalarSizeInBits());
50-
}
51-
5244
namespace llvm {
5345

5446
bool SCCPSolver::isConstant(const ValueLatticeElement &LV) {
@@ -123,10 +115,8 @@ bool SCCPSolver::tryToReplaceWithConstant(Value *V) {
123115
return true;
124116
}
125117

126-
/// Try to replace refine \p Inst with information of its value ranges from \p
127-
/// Solver. For example, SExts are replaced by ZExt, if the value range of the
128-
/// result is non-negative.
129-
static bool refineInstruction(SCCPSolver &Solver,
118+
/// Try to replace signed instructions with their unsigned equivalent.
119+
static bool replaceSignedInst(SCCPSolver &Solver,
130120
SmallPtrSetImpl<Value *> &InsertedValues,
131121
Instruction &Inst) {
132122
// Determine if a signed value is known to be >= 0.
@@ -174,29 +164,6 @@ static bool refineInstruction(SCCPSolver &Solver,
174164
NewInst = BinaryOperator::Create(NewOpcode, Op0, Op1, "", &Inst);
175165
break;
176166
}
177-
case Instruction::Add: {
178-
auto GetRange = [&Solver, &InsertedValues](Value *Op) {
179-
unsigned Bitwidth = Op->getType()->getScalarSizeInBits();
180-
if (InsertedValues.contains(Op) || isa<UndefValue>(Op))
181-
return ConstantRange::getFull(Bitwidth);
182-
if (auto *Const = dyn_cast<ConstantInt>(Op))
183-
return ConstantRange(Const->getValue());
184-
185-
return getConstantRange(Solver.getLatticeValueFor(Op), Op->getType(),
186-
/*UndefAllowed=*/false);
187-
};
188-
189-
auto RangeA = GetRange(Inst.getOperand(0));
190-
auto RangeB = GetRange(Inst.getOperand(1));
191-
auto NUWRange = ConstantRange::makeGuaranteedNoWrapRegion(
192-
Instruction::Add, RangeB, OverflowingBinaryOperator::NoUnsignedWrap);
193-
if (!Inst.hasNoUnsignedWrap() && NUWRange.contains(RangeA)) {
194-
Inst.setHasNoUnsignedWrap();
195-
return true;
196-
}
197-
198-
return false;
199-
}
200167
default:
201168
return false;
202169
}
@@ -225,7 +192,7 @@ bool SCCPSolver::simplifyInstsInBlock(BasicBlock &BB,
225192

226193
MadeChanges = true;
227194
++InstRemovedStat;
228-
} else if (refineInstruction(*this, InsertedValues, Inst)) {
195+
} else if (replaceSignedInst(*this, InsertedValues, Inst)) {
229196
MadeChanges = true;
230197
++InstReplacedStat;
231198
}
@@ -715,6 +682,7 @@ class SCCPInstVisitor : public InstVisitor<SCCPInstVisitor> {
715682
bool isStructLatticeConstant(Function *F, StructType *STy);
716683

717684
Constant *getConstant(const ValueLatticeElement &LV) const;
685+
ConstantRange getConstantRange(const ValueLatticeElement &LV, Type *Ty) const;
718686

719687
SmallPtrSetImpl<Function *> &getArgumentTrackedFunctions() {
720688
return TrackingIncomingArguments;
@@ -815,6 +783,15 @@ Constant *SCCPInstVisitor::getConstant(const ValueLatticeElement &LV) const {
815783
return nullptr;
816784
}
817785

786+
ConstantRange
787+
SCCPInstVisitor::getConstantRange(const ValueLatticeElement &LV,
788+
Type *Ty) const {
789+
assert(Ty->isIntOrIntVectorTy() && "Should be int or int vector");
790+
if (LV.isConstantRange())
791+
return LV.getConstantRange();
792+
return ConstantRange::getFull(Ty->getScalarSizeInBits());
793+
}
794+
818795
void SCCPInstVisitor::markArgInFuncSpecialization(
819796
Function *F, const SmallVectorImpl<ArgInfo> &Args) {
820797
assert(!Args.empty() && "Specialization without arguments");

‎llvm/test/Transforms/SCCP/add-nuw-nsw-flags.ll

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -5,8 +5,8 @@ define i8 @range_from_lshr(i8 %a) {
55
; CHECK-LABEL: @range_from_lshr(
66
; CHECK-NEXT: entry:
77
; CHECK-NEXT: [[A_SHR:%.*]] = lshr i8 [[A:%.*]], 1
8-
; CHECK-NEXT: [[ADD_1:%.*]] = add nuw i8 [[A_SHR]], 1
9-
; CHECK-NEXT: [[ADD_2:%.*]] = add nuw i8 [[A_SHR]], -128
8+
; CHECK-NEXT: [[ADD_1:%.*]] = add i8 [[A_SHR]], 1
9+
; CHECK-NEXT: [[ADD_2:%.*]] = add i8 [[A_SHR]], -128
1010
; CHECK-NEXT: [[ADD_3:%.*]] = add i8 [[A_SHR]], -127
1111
; CHECK-NEXT: [[ADD_4:%.*]] = add i8 [[A_SHR]], -1
1212
; CHECK-NEXT: [[RES_1:%.*]] = xor i8 [[ADD_1]], [[ADD_2]]
@@ -30,7 +30,7 @@ define i8 @a_and_15_add_1(i8 %a) {
3030
; CHECK-LABEL: @a_and_15_add_1(
3131
; CHECK-NEXT: entry:
3232
; CHECK-NEXT: [[A_AND:%.*]] = and i8 [[A:%.*]], 15
33-
; CHECK-NEXT: [[ADD_1:%.*]] = add nuw i8 [[A_AND]], 1
33+
; CHECK-NEXT: [[ADD_1:%.*]] = add i8 [[A_AND]], 1
3434
; CHECK-NEXT: ret i8 [[ADD_1]]
3535
;
3636
entry:
@@ -73,9 +73,9 @@ define i8 @sge_0_and_sle_90(i8 %a) {
7373
; CHECK-NEXT: [[AND:%.*]] = and i1 [[SGT]], [[SLT]]
7474
; CHECK-NEXT: br i1 [[AND]], label [[THEN:%.*]], label [[ELSE:%.*]]
7575
; CHECK: then:
76-
; CHECK-NEXT: [[ADD_1:%.*]] = add nuw i8 [[A]], 1
76+
; CHECK-NEXT: [[ADD_1:%.*]] = add i8 [[A]], 1
7777
; CHECK-NEXT: [[ADD_2:%.*]] = add i8 [[A]], -1
78-
; CHECK-NEXT: [[ADD_3:%.*]] = add nuw i8 [[A]], -91
78+
; CHECK-NEXT: [[ADD_3:%.*]] = add i8 [[A]], -91
7979
; CHECK-NEXT: [[ADD_4:%.*]] = add i8 [[A]], -90
8080
; CHECK-NEXT: [[RES_1:%.*]] = xor i8 [[ADD_1]], [[ADD_2]]
8181
; CHECK-NEXT: [[RES_2:%.*]] = xor i8 [[RES_1]], [[ADD_3]]

‎llvm/test/Transforms/SCCP/binaryops-constexprs.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -36,7 +36,7 @@ entry:
3636
define void @add_constexpr(i32 %a) {
3737
; CHECK-LABEL: @add_constexpr(
3838
; CHECK-NEXT: entry:
39-
; CHECK-NEXT: [[ADD_1:%.*]] = add nuw i32 0, [[A:%.*]]
39+
; CHECK-NEXT: [[ADD_1:%.*]] = add i32 0, [[A:%.*]]
4040
; CHECK-NEXT: call void @use.i32(i32 [[ADD_1]])
4141
; CHECK-NEXT: [[ADD_2:%.*]] = add i32 20, [[A]]
4242
; CHECK-NEXT: call void @use.i32(i32 [[ADD_2]])

‎llvm/test/Transforms/SCCP/conditions-ranges-with-undef.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -8,7 +8,7 @@ declare void @use(i1)
88
define void @val_undef_eq() {
99
; CHECK-LABEL: @val_undef_eq(
1010
; CHECK-NEXT: entry:
11-
; CHECK-NEXT: [[A:%.*]] = add nuw i32 undef, 0
11+
; CHECK-NEXT: [[A:%.*]] = add i32 undef, 0
1212
; CHECK-NEXT: [[BC_1:%.*]] = icmp eq i32 [[A]], 10
1313
; CHECK-NEXT: br i1 [[BC_1]], label [[TRUE:%.*]], label [[FALSE:%.*]]
1414
; CHECK: true:
@@ -41,7 +41,7 @@ declare void @use.i32(i32)
4141
define void @val_undef_range() {
4242
; CHECK-LABEL: @val_undef_range(
4343
; CHECK-NEXT: entry:
44-
; CHECK-NEXT: [[A:%.*]] = add nuw i32 undef, 0
44+
; CHECK-NEXT: [[A:%.*]] = add i32 undef, 0
4545
; CHECK-NEXT: [[BC_1:%.*]] = icmp ult i32 [[A]], 127
4646
; CHECK-NEXT: br i1 [[BC_1]], label [[TRUE:%.*]], label [[FALSE:%.*]]
4747
; CHECK: true:

‎llvm/test/Transforms/SCCP/conditions-ranges.ll

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -7,7 +7,7 @@ define void @f1(i32 %a, i32 %b) {
77
; CHECK-LABEL: @f1(
88
; CHECK-NEXT: entry:
99
; CHECK-NEXT: [[A_255:%.*]] = and i32 [[A:%.*]], 255
10-
; CHECK-NEXT: [[A_2:%.*]] = add nuw i32 [[A_255]], 20
10+
; CHECK-NEXT: [[A_2:%.*]] = add i32 [[A_255]], 20
1111
; CHECK-NEXT: [[BC:%.*]] = icmp ugt i32 [[B:%.*]], [[A_2]]
1212
; CHECK-NEXT: br i1 [[BC]], label [[TRUE:%.*]], label [[FALSE:%.*]]
1313
; CHECK: true:
@@ -260,7 +260,7 @@ define void @f8_nested_conds(i32 %a, i32 %b) {
260260
; CHECK-LABEL: @f8_nested_conds(
261261
; CHECK-NEXT: entry:
262262
; CHECK-NEXT: [[A_255:%.*]] = and i32 [[A:%.*]], 255
263-
; CHECK-NEXT: [[A_2:%.*]] = add nuw i32 [[A_255]], 20
263+
; CHECK-NEXT: [[A_2:%.*]] = add i32 [[A_255]], 20
264264
; CHECK-NEXT: [[BC_1:%.*]] = icmp ugt i32 [[B:%.*]], [[A_2]]
265265
; CHECK-NEXT: br i1 [[BC_1]], label [[TRUE:%.*]], label [[FALSE:%.*]]
266266
; CHECK: true:
@@ -718,7 +718,7 @@ define void @loop() {
718718
; CHECK-NEXT: [[INC27]] = add nsw i32 [[I_0]], 1
719719
; CHECK-NEXT: br label [[FOR_COND]]
720720
; CHECK: for.body14:
721-
; CHECK-NEXT: [[INC]] = add nuw nsw i32 [[J_0]], 1
721+
; CHECK-NEXT: [[INC]] = add nsw i32 [[J_0]], 1
722722
; CHECK-NEXT: br label [[FOR_COND11]]
723723
;
724724
entry:

‎llvm/test/Transforms/SCCP/ip-add-range-to-call.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -15,7 +15,7 @@ define i32 @caller1() {
1515
; CHECK-LABEL: @caller1(
1616
; CHECK-NEXT: [[C1:%.*]] = call i32 @callee(i32 10), !range [[RNG0:![0-9]+]]
1717
; CHECK-NEXT: [[C2:%.*]] = call i32 @callee(i32 20), !range [[RNG0]]
18-
; CHECK-NEXT: [[A:%.*]] = add nuw i32 [[C1]], [[C2]]
18+
; CHECK-NEXT: [[A:%.*]] = add i32 [[C1]], [[C2]]
1919
; CHECK-NEXT: ret i32 [[A]]
2020
;
2121
%c1 = call i32 @callee(i32 10)

‎llvm/test/Transforms/SCCP/ip-constant-ranges.ll

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -33,9 +33,9 @@ define internal i32 @f2(i32 %x) {
3333
; CHECK-NEXT: [[CMP4:%.*]] = icmp ugt i32 [[X]], 300
3434
; CHECK-NEXT: [[RES1:%.*]] = select i1 [[CMP]], i32 1, i32 2
3535
; CHECK-NEXT: [[RES4:%.*]] = select i1 [[CMP4]], i32 3, i32 4
36-
; CHECK-NEXT: [[RES6:%.*]] = add nuw i32 [[RES1]], 3
37-
; CHECK-NEXT: [[RES7:%.*]] = add nuw i32 5, [[RES4]]
38-
; CHECK-NEXT: [[RES:%.*]] = add nuw i32 [[RES6]], 5
36+
; CHECK-NEXT: [[RES6:%.*]] = add i32 [[RES1]], 3
37+
; CHECK-NEXT: [[RES7:%.*]] = add i32 5, [[RES4]]
38+
; CHECK-NEXT: [[RES:%.*]] = add i32 [[RES6]], 5
3939
; CHECK-NEXT: ret i32 [[RES]]
4040
;
4141
entry:
@@ -63,8 +63,8 @@ define i32 @caller1() {
6363
; CHECK-NEXT: [[CALL2:%.*]] = tail call i32 @f1(i32 47, i32 999)
6464
; CHECK-NEXT: [[CALL3:%.*]] = tail call i32 @f2(i32 47)
6565
; CHECK-NEXT: [[CALL4:%.*]] = tail call i32 @f2(i32 301)
66-
; CHECK-NEXT: [[RES_1:%.*]] = add nuw nsw i32 12, [[CALL3]]
67-
; CHECK-NEXT: [[RES_2:%.*]] = add nuw nsw i32 [[RES_1]], [[CALL4]]
66+
; CHECK-NEXT: [[RES_1:%.*]] = add nsw i32 12, [[CALL3]]
67+
; CHECK-NEXT: [[RES_2:%.*]] = add nsw i32 [[RES_1]], [[CALL4]]
6868
; CHECK-NEXT: ret i32 [[RES_2]]
6969
;
7070
entry:

‎llvm/test/Transforms/SCCP/ip-ranges-binaryops.ll

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -5,13 +5,13 @@
55
; x + y = [110, 221)
66
define internal i1 @f.add(i32 %x, i32 %y) {
77
; CHECK-LABEL: @f.add(
8-
; CHECK-NEXT: [[A_1:%.*]] = add nuw i32 [[X:%.*]], [[Y:%.*]]
8+
; CHECK-NEXT: [[A_1:%.*]] = add i32 [[X:%.*]], [[Y:%.*]]
99
; CHECK-NEXT: [[C_2:%.*]] = icmp sgt i32 [[A_1]], 219
1010
; CHECK-NEXT: [[C_4:%.*]] = icmp slt i32 [[A_1]], 111
1111
; CHECK-NEXT: [[C_5:%.*]] = icmp eq i32 [[A_1]], 150
1212
; CHECK-NEXT: [[C_6:%.*]] = icmp slt i32 [[A_1]], 150
13-
; CHECK-NEXT: [[RES_1:%.*]] = add nuw i1 false, [[C_2]]
14-
; CHECK-NEXT: [[RES_2:%.*]] = add nuw i1 [[RES_1]], false
13+
; CHECK-NEXT: [[RES_1:%.*]] = add i1 false, [[C_2]]
14+
; CHECK-NEXT: [[RES_2:%.*]] = add i1 [[RES_1]], false
1515
; CHECK-NEXT: [[RES_3:%.*]] = add i1 [[RES_2]], [[C_4]]
1616
; CHECK-NEXT: [[RES_4:%.*]] = add i1 [[RES_3]], [[C_5]]
1717
; CHECK-NEXT: [[RES_5:%.*]] = add i1 [[RES_4]], [[C_6]]
@@ -55,8 +55,8 @@ define internal i1 @f.sub(i32 %x, i32 %y) {
5555
; CHECK-NEXT: [[C_4:%.*]] = icmp slt i32 [[A_1]], -189
5656
; CHECK-NEXT: [[C_5:%.*]] = icmp eq i32 [[A_1]], -150
5757
; CHECK-NEXT: [[C_6:%.*]] = icmp slt i32 [[A_1]], -150
58-
; CHECK-NEXT: [[RES_1:%.*]] = add nuw i1 false, [[C_2]]
59-
; CHECK-NEXT: [[RES_2:%.*]] = add nuw i1 [[RES_1]], false
58+
; CHECK-NEXT: [[RES_1:%.*]] = add i1 false, [[C_2]]
59+
; CHECK-NEXT: [[RES_2:%.*]] = add i1 [[RES_1]], false
6060
; CHECK-NEXT: [[RES_3:%.*]] = add i1 [[RES_2]], [[C_4]]
6161
; CHECK-NEXT: [[RES_4:%.*]] = add i1 [[RES_3]], [[C_5]]
6262
; CHECK-NEXT: [[RES_5:%.*]] = add i1 [[RES_4]], [[C_6]]
@@ -99,8 +99,8 @@ define internal i1 @f.mul(i32 %x, i32 %y) {
9999
; CHECK-NEXT: [[C_4:%.*]] = icmp slt i32 [[A_1]], 1001
100100
; CHECK-NEXT: [[C_5:%.*]] = icmp eq i32 [[A_1]], 1500
101101
; CHECK-NEXT: [[C_6:%.*]] = icmp slt i32 [[A_1]], 1500
102-
; CHECK-NEXT: [[RES_1:%.*]] = add nuw i1 false, [[C_2]]
103-
; CHECK-NEXT: [[RES_2:%.*]] = add nuw i1 [[RES_1]], false
102+
; CHECK-NEXT: [[RES_1:%.*]] = add i1 false, [[C_2]]
103+
; CHECK-NEXT: [[RES_2:%.*]] = add i1 [[RES_1]], false
104104
; CHECK-NEXT: [[RES_3:%.*]] = add i1 [[RES_2]], [[C_4]]
105105
; CHECK-NEXT: [[RES_4:%.*]] = add i1 [[RES_3]], [[C_5]]
106106
; CHECK-NEXT: [[RES_5:%.*]] = add i1 [[RES_4]], [[C_6]]

‎llvm/test/Transforms/SCCP/ip-ranges-casts.ll

Lines changed: 9 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -7,8 +7,8 @@ define internal i1 @f.trunc(i32 %x) {
77
; CHECK-NEXT: [[T_1:%.*]] = trunc i32 [[X:%.*]] to i16
88
; CHECK-NEXT: [[C_2:%.*]] = icmp sgt i16 [[T_1]], 299
99
; CHECK-NEXT: [[C_4:%.*]] = icmp slt i16 [[T_1]], 101
10-
; CHECK-NEXT: [[RES_1:%.*]] = add nuw i1 false, [[C_2]]
11-
; CHECK-NEXT: [[RES_2:%.*]] = add nuw i1 [[RES_1]], false
10+
; CHECK-NEXT: [[RES_1:%.*]] = add i1 false, [[C_2]]
11+
; CHECK-NEXT: [[RES_2:%.*]] = add i1 [[RES_1]], false
1212
; CHECK-NEXT: [[RES_3:%.*]] = add i1 [[RES_2]], [[C_4]]
1313
; CHECK-NEXT: [[T_2:%.*]] = trunc i32 [[X]] to i8
1414
; CHECK-NEXT: [[C_5:%.*]] = icmp sgt i8 [[T_2]], 44
@@ -62,16 +62,16 @@ define internal i1 @f.zext(i32 %x, i32 %y) {
6262
; CHECK-NEXT: [[T_1:%.*]] = zext i32 [[X:%.*]] to i64
6363
; CHECK-NEXT: [[C_2:%.*]] = icmp sgt i64 [[T_1]], 299
6464
; CHECK-NEXT: [[C_4:%.*]] = icmp slt i64 [[T_1]], 101
65-
; CHECK-NEXT: [[RES_1:%.*]] = add nuw i1 false, [[C_2]]
66-
; CHECK-NEXT: [[RES_2:%.*]] = add nuw i1 [[RES_1]], false
65+
; CHECK-NEXT: [[RES_1:%.*]] = add i1 false, [[C_2]]
66+
; CHECK-NEXT: [[RES_2:%.*]] = add i1 [[RES_1]], false
6767
; CHECK-NEXT: [[RES_3:%.*]] = add i1 [[RES_2]], [[C_4]]
6868
; CHECK-NEXT: [[T_2:%.*]] = zext i32 [[Y:%.*]] to i64
6969
; CHECK-NEXT: [[C_5:%.*]] = icmp sgt i64 [[T_2]], 300
7070
; CHECK-NEXT: [[C_6:%.*]] = icmp sgt i64 [[T_2]], 299
7171
; CHECK-NEXT: [[C_8:%.*]] = icmp slt i64 [[T_2]], 1
7272
; CHECK-NEXT: [[RES_4:%.*]] = add i1 [[RES_3]], [[C_5]]
7373
; CHECK-NEXT: [[RES_5:%.*]] = add i1 [[RES_4]], [[C_6]]
74-
; CHECK-NEXT: [[RES_6:%.*]] = add nuw i1 [[RES_5]], false
74+
; CHECK-NEXT: [[RES_6:%.*]] = add i1 [[RES_5]], false
7575
; CHECK-NEXT: [[RES_7:%.*]] = add i1 [[RES_6]], [[C_8]]
7676
; CHECK-NEXT: ret i1 [[RES_7]]
7777
;
@@ -115,15 +115,15 @@ define internal i1 @f.sext(i32 %x, i32 %y) {
115115
; CHECK-NEXT: [[T_1:%.*]] = zext i32 [[X:%.*]] to i64
116116
; CHECK-NEXT: [[C_2:%.*]] = icmp sgt i64 [[T_1]], 299
117117
; CHECK-NEXT: [[C_4:%.*]] = icmp slt i64 [[T_1]], 101
118-
; CHECK-NEXT: [[RES_1:%.*]] = add nuw i1 false, [[C_2]]
119-
; CHECK-NEXT: [[RES_2:%.*]] = add nuw i1 [[RES_1]], false
118+
; CHECK-NEXT: [[RES_1:%.*]] = add i1 false, [[C_2]]
119+
; CHECK-NEXT: [[RES_2:%.*]] = add i1 [[RES_1]], false
120120
; CHECK-NEXT: [[RES_3:%.*]] = add i1 [[RES_2]], [[C_4]]
121121
; CHECK-NEXT: [[T_2:%.*]] = sext i32 [[Y:%.*]] to i64
122122
; CHECK-NEXT: [[C_6:%.*]] = icmp sgt i64 [[T_2]], 899
123123
; CHECK-NEXT: [[C_8:%.*]] = icmp slt i64 [[T_2]], -119
124-
; CHECK-NEXT: [[RES_4:%.*]] = add nuw i1 [[RES_3]], false
124+
; CHECK-NEXT: [[RES_4:%.*]] = add i1 [[RES_3]], false
125125
; CHECK-NEXT: [[RES_5:%.*]] = add i1 [[RES_4]], [[C_6]]
126-
; CHECK-NEXT: [[RES_6:%.*]] = add nuw i1 [[RES_5]], false
126+
; CHECK-NEXT: [[RES_6:%.*]] = add i1 [[RES_5]], false
127127
; CHECK-NEXT: [[RES_7:%.*]] = add i1 [[RES_6]], [[C_8]]
128128
; CHECK-NEXT: ret i1 [[RES_7]]
129129
;

‎llvm/test/Transforms/SCCP/ip-ranges-phis.ll

Lines changed: 12 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -55,12 +55,12 @@ define internal i32 @f2(i32 %x, i32 %y, i32 %z, i1 %cmp.1, i1 %cmp.2) {
5555
; CHECK-NEXT: [[V_1:%.*]] = select i1 [[C_1]], i32 10, i32 100
5656
; CHECK-NEXT: [[V_2:%.*]] = select i1 [[C_2]], i32 20, i32 200
5757
; CHECK-NEXT: [[V_3:%.*]] = select i1 [[C_3]], i32 30, i32 300
58-
; CHECK-NEXT: [[R_1:%.*]] = add nuw i32 [[V_1]], [[V_2]]
59-
; CHECK-NEXT: [[R_2:%.*]] = add nuw i32 [[R_1]], [[V_3]]
60-
; CHECK-NEXT: [[R_3:%.*]] = add nuw i32 [[R_2]], 400
61-
; CHECK-NEXT: [[R_4:%.*]] = add nuw i32 [[R_3]], 50
62-
; CHECK-NEXT: [[R_5:%.*]] = add nuw i32 [[R_4]], 60
63-
; CHECK-NEXT: [[R_6:%.*]] = add nuw i32 [[R_4]], 700
58+
; CHECK-NEXT: [[R_1:%.*]] = add i32 [[V_1]], [[V_2]]
59+
; CHECK-NEXT: [[R_2:%.*]] = add i32 [[R_1]], [[V_3]]
60+
; CHECK-NEXT: [[R_3:%.*]] = add i32 [[R_2]], 400
61+
; CHECK-NEXT: [[R_4:%.*]] = add i32 [[R_3]], 50
62+
; CHECK-NEXT: [[R_5:%.*]] = add i32 [[R_4]], 60
63+
; CHECK-NEXT: [[R_6:%.*]] = add i32 [[R_4]], 700
6464
; CHECK-NEXT: ret i32 [[R_6]]
6565
;
6666

@@ -154,12 +154,12 @@ define internal i32 @f3(i32 %x, i32 %y, i1 %cmp.1) {
154154
; CHECK-NEXT: [[V_5:%.*]] = select i1 [[C_5]], i32 50, i32 500
155155
; CHECK-NEXT: [[V_6:%.*]] = select i1 [[C_6]], i32 60, i32 600
156156
; CHECK-NEXT: [[V_7:%.*]] = select i1 [[C_7]], i32 70, i32 700
157-
; CHECK-NEXT: [[R_1:%.*]] = add nuw i32 [[V_1]], [[V_2]]
158-
; CHECK-NEXT: [[R_2:%.*]] = add nuw i32 [[R_1]], [[V_3]]
159-
; CHECK-NEXT: [[R_3:%.*]] = add nuw i32 [[R_2]], [[V_4]]
160-
; CHECK-NEXT: [[R_4:%.*]] = add nuw i32 [[R_3]], [[V_5]]
161-
; CHECK-NEXT: [[R_5:%.*]] = add nuw i32 [[R_4]], [[V_6]]
162-
; CHECK-NEXT: [[R_6:%.*]] = add nuw i32 [[R_4]], [[V_7]]
157+
; CHECK-NEXT: [[R_1:%.*]] = add i32 [[V_1]], [[V_2]]
158+
; CHECK-NEXT: [[R_2:%.*]] = add i32 [[R_1]], [[V_3]]
159+
; CHECK-NEXT: [[R_3:%.*]] = add i32 [[R_2]], [[V_4]]
160+
; CHECK-NEXT: [[R_4:%.*]] = add i32 [[R_3]], [[V_5]]
161+
; CHECK-NEXT: [[R_5:%.*]] = add i32 [[R_4]], [[V_6]]
162+
; CHECK-NEXT: [[R_6:%.*]] = add i32 [[R_4]], [[V_7]]
163163
; CHECK-NEXT: ret i32 [[R_6]]
164164
;
165165

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