Fix Tests, Relaxation

Author: lenary

llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp

@@ -340,8 +340,11 @@ void RISCVMCCodeEmitter::expandLongCondBr(const MCInst &MI,
   // Drop any fixup added so we can add the correct one.
   Fixups.resize(FixupStartIndex);
 
-  if (SrcSymbol.isExpr())
+  if (SrcSymbol.isExpr()) {
     addFixup(Fixups, Offset, SrcSymbol.getExpr(), RISCV::fixup_riscv_jal);
+    if (STI.hasFeature(RISCV::FeatureRelax))
+      Fixups.back().setLinkerRelaxable();
+  }
 }
 
 // Expand PseudoLongQC_(E_)Bxxx to an inverted conditional branch and an
@@ -388,8 +391,11 @@ void RISCVMCCodeEmitter::expandQCLongCondBrImm(const MCInst &MI,
   support::endian::write(CB, JBinary, llvm::endianness::little);
   // Drop any fixup added so we can add the correct one.
   Fixups.resize(FixupStartIndex);
-  if (SrcSymbol.isExpr())
+  if (SrcSymbol.isExpr()) {
     addFixup(Fixups, Offset, SrcSymbol.getExpr(), RISCV::fixup_riscv_jal);
+    if (STI.hasFeature(RISCV::FeatureRelax))
+      Fixups.back().setLinkerRelaxable();
+  }
 }
 
 void RISCVMCCodeEmitter::encodeInstruction(const MCInst &MI,

llvm/test/MC/RISCV/Relocations/expr.s

@@ -14,6 +14,7 @@ call relax
 jal zero, .LBB0+16
 # CHECK-INSTR: jal zero, 0x10
 # CHECK-RELOC:  R_RISCV_JAL
+# CHECK-RELOC-NEXT: R_RISCV_RELAX
 
 beq a0, a1, .LBB1+32
 # CHECK-INSTR: beq a0, a1, 0x20
@@ -31,4 +32,5 @@ c.beqz a0, .-2
 
 call relax
 # CHECK-RELOC-NEXT:  R_RISCV_CALL_PLT
+# CHECK-RELOC-NEXT:  R_RISCV_RELAX
 .LBB2:

llvm/test/MC/RISCV/compressed-relocations.s

@@ -3,18 +3,20 @@
 # RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+c < %s \
 # RUN:     | llvm-readobj -r - | FileCheck -check-prefix=RELOC %s
 # RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+c,+relax < %s \
-# RUN:     | llvm-readobj -r - | FileCheck -check-prefix=RELOC %s
+# RUN:     | llvm-readobj -r - | FileCheck -check-prefixes=RELOC,RELAX %s
 
 # Check prefixes:
 # RELOC - Check the relocation in the object.
 # INSTR - Check the instruction is handled properly by the ASMPrinter
 c.jal foo
 # A compressed jump (c.j) to an unresolved symbol will be relaxed to a (jal).
 # RELOC: R_RISCV_JAL
+# RELAX-NEXT: R_RISCV_RELAX
 # INSTR: c.jal foo
 
 c.bnez a0, foo
 # A compressed branch (c.bnez) to an unresolved symbol will be relaxed to a (bnez).
 # The (bnez) to an unresolved symbol will in turn be relaxed to (beqz; jal)
 # RELOC-NEXT: R_RISCV_JAL
+# RELAX-NEXT: R_RISCV_RELAX
 # INSTR: c.bnez a0, foo

llvm/test/MC/RISCV/option-relax.s

@@ -39,6 +39,7 @@ call bar
 
 .dword .L2-.L1
 # CHECK-RELOC-NEXT: R_RISCV_JAL
+# CHECK-RELOC-NEXT: R_RISCV_RELAX
 jal zero, .L1
 # CHECK-RELOC-NEXT: R_RISCV_BRANCH
 beq s1, s1, .L1

llvm/test/MC/RISCV/xqcibi-relocations.s

@@ -91,12 +91,14 @@ qc.e.bgeui s2, 24, same_section
 # OBJ: qc.beqi t1, 0xa, 0x42 <same_section_extern+0x16>
 # OBJ-NEXT: j 0x3e <same_section_extern+0x12>
 # OBJ-NEXT: R_RISCV_JAL undef{{$}}
+# OBJ-NEXT: R_RISCV_RELAX *ABS*{{$}}
 qc.bnei t1, 10, undef
 
 # ASM: qc.e.bgeui s0, 40, undef
 # OBJ-NEXT: qc.e.bltui s0, 0x28, 0x4c <same_section_extern+0x20>
 # OBJ-NEXT: j 0x48 <same_section_extern+0x1c>
 # OBJ-NEXT: R_RISCV_JAL undef{{$}}
+# OBJ-NEXT: R_RISCV_RELAX *ABS*{{$}}
 qc.e.bgeui s0, 40, undef
 
 .section .text.second, "ax", @progbits