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1 parent abf18ac commit ca00d92Copy full SHA for ca00d92
llvm/test/CodeGen/NVPTX/szext.ll
@@ -1,7 +1,8 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc -o - < %s -mcpu=sm_70 -mattr=+ptx76 | FileCheck %s
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+; RUN: %if ptxas %{ llc < %s -mcpu=sm_70 -mattr=+ptx76 | %ptxas-verify -arch=sm_70 %}
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-target triple = "nvptx-unknown-cuda"
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+target triple = "nvptx64-unknown-cuda"
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define i32 @szext_wrap_u32(i32 %a, i32 %b) {
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; CHECK-LABEL: szext_wrap_u32(
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