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llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -3415,15 +3415,15 @@ SDValue NVPTXTargetLowering::LowerFormalArguments(
34153415

34163416
// Extend or truncate the element if necessary (e.g. an i8 is loaded
34173417
// into an i16 register)
3418-
const EVT ExpactedVT = ArgIns[I + J].VT;
3419-
assert((Elt.getValueType() == ExpactedVT ||
3420-
(ExpactedVT.isInteger() && Elt.getValueType().isInteger())) &&
3418+
const EVT ExpectedVT = ArgIns[I + J].VT;
3419+
assert((Elt.getValueType() == ExpectedVT ||
3420+
(ExpectedVT.isInteger() && Elt.getValueType().isInteger())) &&
34213421
"Non-integer argument type size mismatch");
3422-
if (ExpactedVT.bitsGT(Elt.getValueType()))
3423-
Elt = DAG.getNode(getExtOpcode(ArgIns[I + J].Flags), dl, ExpactedVT,
3422+
if (ExpectedVT.bitsGT(Elt.getValueType()))
3423+
Elt = DAG.getNode(getExtOpcode(ArgIns[I + J].Flags), dl, ExpectedVT,
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Elt);
3425-
else if (ExpactedVT.bitsLT(Elt.getValueType()))
3426-
Elt = DAG.getNode(ISD::TRUNCATE, dl, ExpactedVT, Elt);
3425+
else if (ExpectedVT.bitsLT(Elt.getValueType()))
3426+
Elt = DAG.getNode(ISD::TRUNCATE, dl, ExpectedVT, Elt);
34273427
InVals.push_back(Elt);
34283428
}
34293429
I += NumElts;

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