@@ -593,11 +593,12 @@ void SIPreEmitPeephole::collectUnpackingCandidates(
593593 for (auto I = std::next (BeginMI.getIterator ()); I != E; ++I) {
594594 MachineInstr &Instr = *I;
595595 uint16_t UnpackedOpCode = mapToUnpackedOpcode (Instr);
596+ bool IsUnpackable = !(UnpackedOpCode == std::numeric_limits<uint16_t >::max ());
596597 if (Instr.isMetaInstruction ())
597598 continue ;
598599 if ((Instr.isTerminator ()) ||
599600 (TII->isNeverCoissue (Instr) &&
600- (UnpackedOpCode == std::numeric_limits< uint16_t >:: max ()) ) ||
601+ !IsUnpackable ) ||
601602 (SIInstrInfo::modifiesModeRegister (Instr) &&
602603 Instr.modifiesRegister (AMDGPU::EXEC, TRI)))
603604 return ;
@@ -621,7 +622,7 @@ void SIPreEmitPeephole::collectUnpackingCandidates(
621622 if (TRI->regsOverlap (MFMADef, InstrMO.getReg ()))
622623 return ;
623624 }
624- if (UnpackedOpCode == std::numeric_limits< uint16_t >:: max () )
625+ if (!IsUnpackable )
625626 continue ;
626627
627628 if (canUnpackingClobberRegister (Instr))
@@ -771,7 +772,7 @@ bool SIPreEmitPeephole::run(MachineFunction &MF) {
771772 // side effects.
772773
773774 // Perform the extra MF scans only for supported archs
774- if (ST.hasGFX950Insts () || ST. hasGFX940Insts ()) {
775+ if (ST.hasGFX940Insts ()) {
775776 for (MachineBasicBlock &MBB : MF) {
776777 // Unpack packed instructions overlapped by MFMAs. This allows the
777778 // compiler to co-issue unpacked instructions with MFMA
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