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llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -4831,10 +4831,10 @@ AMDGPUTargetLowering::foldFreeOpFromSelect(TargetLowering::DAGCombinerInfo &DCI,
48314831
}
48324832

48334833
static EVT getFloatVT(EVT VT) {
4834-
return VT = VT.isVector() ? MVT::getVectorVT(MVT::getFloatingPointVT(
4835-
VT.getScalarSizeInBits()),
4836-
VT.getVectorNumElements())
4837-
: MVT::getFloatingPointVT(VT.getFixedSizeInBits());
4834+
return VT.isVector() ? MVT::getVectorVT(
4835+
MVT::getFloatingPointVT(VT.getScalarSizeInBits()),
4836+
VT.getVectorNumElements())
4837+
: MVT::getFloatingPointVT(VT.getFixedSizeInBits());
48384838
}
48394839

48404840
static SDValue getBitwiseToSrcModifierOp(SDValue N,
@@ -4871,7 +4871,7 @@ static SDValue getBitwiseToSrcModifierOp(SDValue N,
48714871
case ISD::OR:
48724872
if ((Mask == 0x80000000u && VT.getFixedSizeInBits() == 32) ||
48734873
(Mask == 0x8000000000000000u && VT.getFixedSizeInBits() == 64)) {
4874-
SDValue Abs = DAG.getNode(ISD::ABS, SDLoc(N), FVT, BC);
4874+
SDValue Abs = DAG.getNode(ISD::FABS, SL, FVT, BC);
48754875
return DAG.getNode(ISD::FNEG, SL, FVT, Abs);
48764876
}
48774877
break;

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