Add requested test and update description

Author: Andres-Salamanca

clang/include/clang/CIR/Dialect/IR/CIROps.td

@@ -1682,7 +1682,7 @@ def SetBitfieldOp : CIR_Op<"set_bitfield"> {
     A bitfield info attribute must be provided to describe the location of
     the bitfield within the memory referenced by the $addr argument.
     The $src argument is inserted at the appropriate place in the memory and
-    the value that was stored. Returns a value being stored.
+    the value that was stored. Returns the value being stored.
 
     A unit attribute `volatile` can be used to indicate a volatile store of the
     bitfield.

clang/test/CIR/CodeGen/bitfields.cpp

@@ -83,3 +83,45 @@ void store_field() {
 // OGCG:   [[TMP2:%.*]] = and i64 [[TMP1]], -16
 // OGCG:   [[TMP3:%.*]] = or i64 [[TMP2]], 3
 // OGCG:   store i64 [[TMP3]], ptr [[TMP0]], align 4
+
+void store_bitfield_to_bitfield(S* s) {
+  s->a = s->b = 3;
+}
+
+// CIR: cir.func dso_local @_Z26store_bitfield_to_bitfieldP1S
+// CIR:   [[TMP0:%.*]] = cir.alloca !cir.ptr<!rec_S>, !cir.ptr<!cir.ptr<!rec_S>>, ["s", init] {alignment = 8 : i64}
+// CIR:   [[TMP1:%.*]] = cir.const #cir.int<3> : !s32i
+// CIR:   [[TMP2:%.*]] = cir.load align(8) [[TMP0]] : !cir.ptr<!cir.ptr<!rec_S>>, !cir.ptr<!rec_S>
+// CIR:   [[TMP3:%.*]] = cir.get_member [[TMP2]][0] {name = "b"} : !cir.ptr<!rec_S> -> !cir.ptr<!u64i>
+// CIR:   [[TMP4:%.*]] = cir.set_bitfield(#bfi_b, [[TMP3]] : !cir.ptr<!u64i>, [[TMP1]] : !s32i) -> !s32i
+// CIR:   [[TMP5:%.*]] = cir.load align(8) [[TMP0]] : !cir.ptr<!cir.ptr<!rec_S>>, !cir.ptr<!rec_S>
+// CIR:   [[TMP6:%.*]] = cir.get_member [[TMP5]][0] {name = "a"} : !cir.ptr<!rec_S> -> !cir.ptr<!u64i>
+// CIR:   [[TMP7:%.*]] = cir.set_bitfield(#bfi_a, [[TMP6]] : !cir.ptr<!u64i>, [[TMP4]] : !s32i) -> !s32i
+
+// LLVM: define dso_local void @_Z26store_bitfield_to_bitfieldP1S
+// LLVM:   [[TMP0:%.*]] = alloca ptr, i64 1, align 8
+// LLVM:   [[TMP1:%.*]] = load ptr, ptr [[TMP0]], align 8
+// LLVM:   [[TMP2:%.*]] = getelementptr %struct.S, ptr [[TMP1]], i32 0, i32 0
+// LLVM:   [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 8
+// LLVM:   [[TMP4:%.*]] = and i64 [[TMP3]], -2147483633
+// LLVM:   [[TMP5:%.*]] = or i64 [[TMP4]], 48
+// LLVM:   store i64 [[TMP5]], ptr [[TMP2]], align 8
+// LLVM:   [[TMP6:%.*]] = load ptr, ptr [[TMP0]], align 8
+// LLVM:   [[TMP7:%.*]] = getelementptr %struct.S, ptr [[TMP6]], i32 0, i32 0
+// LLVM:   [[TMP8:%.*]] = load i64, ptr [[TMP7]], align 8
+// LLVM:   [[TMP9:%.*]] = and i64 [[TMP8]], -16
+// LLVM:   [[TMP10:%.*]] = or i64 [[TMP9]], 3
+// LLVM:   store i64 [[TMP10]], ptr [[TMP7]], align 8
+
+// OGCG: define dso_local void @_Z26store_bitfield_to_bitfieldP1S
+// OGCG:   [[TMP0:%.*]] = alloca ptr, align 8
+// OGCG:   [[TMP1:%.*]] = load ptr, ptr [[TMP0]], align 8
+// OGCG:   [[TMP2:%.*]] = load i64, ptr [[TMP1]], align 4
+// OGCG:   [[TMP3:%.*]] = and i64 [[TMP2]], -2147483633
+// OGCG:   [[TMP4:%.*]] = or i64 [[TMP3]], 48
+// OGCG:   store i64 [[TMP4]], ptr [[TMP1]], align 4
+// OGCG:   [[TMP5:%.*]] = load ptr, ptr [[TMP0]], align 8
+// OGCG:   [[TMP6:%.*]] = load i64, ptr [[TMP5]], align 4
+// OGCG:   [[TMP7:%.*]] = and i64 [[TMP6]], -16
+// OGCG:   [[TMP8:%.*]] = or i64 [[TMP7]], 3
+// OGCG:   store i64 [[TMP8]], ptr [[TMP5]], align 4