Update llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp

realqhc · mshockwave · web-flow · commit cba5a9045390 · 2025-02-28T10:01:22.000+11:00
Co-authored-by: Min-Yih Hsu &lt;min@myhsu.dev&gt;
diff --git a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp b/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
@@ -227,8 +227,7 @@ static DecodeStatus DecodeGPRPairRegisterClass(MCInst &Inst, uint32_t RegNo,
 static DecodeStatus decodeRVPGPRPair(MCInst &Inst, uint32_t RegNo,
                                      uint64_t Address,
                                      const MCDisassembler *Decoder) {
-  RegNo = RegNo << 1;
-  return DecodeGPRPairRegisterClass(Inst, RegNo, Address, Decoder);
+  return DecodeGPRPairRegisterClass(Inst, RegNo << 1, Address, Decoder);
 }
 
 static DecodeStatus DecodeSR07RegisterClass(MCInst &Inst, uint32_t RegNo,

Original file line number	Diff line number	Diff line change
`@@ -227,8 +227,7 @@ static DecodeStatus DecodeGPRPairRegisterClass(MCInst &Inst, uint32_t RegNo,`
`227`	`227`	`static DecodeStatus decodeRVPGPRPair(MCInst &Inst, uint32_t RegNo,`
`228`	`228`	`uint64_t Address,`
`229`	`229`	`const MCDisassembler *Decoder) {`
`230`		`- RegNo = RegNo << 1;`
`231`		`- return DecodeGPRPairRegisterClass(Inst, RegNo, Address, Decoder);`
	`230`	`+ return DecodeGPRPairRegisterClass(Inst, RegNo << 1, Address, Decoder);`
`232`	`231`	`}`
`233`	`232`
`234`	`233`	`static DecodeStatus DecodeSR07RegisterClass(MCInst &Inst, uint32_t RegNo,`