@@ -15589,19 +15589,13 @@ SDValue PPCTargetLowering::combineSetCC(SDNode *N,
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if (LA->getExtensionType() != ISD::NON_EXTLOAD ||
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LB->getExtensionType() != ISD::NON_EXTLOAD)
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return SDValue();
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- // Build new v16i8 loads using the SAME chain/base/MMO (no extra memory
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+ // Build new v16i8 loads using the same chain/base/MMO (no extra memory
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// op).
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SDValue LHSVec = DAG.getLoad(MVT::v16i8, DL, LA->getChain(),
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LA->getBasePtr(), LA->getMemOperand());
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SDValue RHSVec = DAG.getLoad(MVT::v16i8, DL, LB->getChain(),
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LB->getBasePtr(), LB->getMemOperand());
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- // Replace old loads?¡¥ results (value and chain) so the old nodes die.
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- // DAG.DeleteNode(LHS.getNode());
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- // DAG.DeleteNode(RHS.getNode());
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-
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- // SDValue LHSVec = DAG.getBitcast(MVT::v16i8, LHS);
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- // SDValue RHSVec = DAG.getBitcast(MVT::v16i8, RHS);
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SDValue IntrID =
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DAG.getTargetConstant(Intrinsic::ppc_altivec_vcmpequb_p, DL,
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Subtarget.isPPC64() ? MVT::i64 : MVT::i32);
@@ -15610,6 +15604,7 @@ SDValue PPCTargetLowering::combineSetCC(SDNode *N,
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SDValue Ops[] = {IntrID, CRSel, LHSVec, RHSVec};
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SDValue PredResult =
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DAG.getNode(ISD::INTRINSIC_WO_CHAIN, DL, MVT::i32, Ops);
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+
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// ppc_altivec_vcmpequb_p returns 1 when two vectors are the same,
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// so we need to invert the CC opcode.
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return DAG.getSetCC(DL, N->getValueType(0), PredResult,
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