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[AArch64] Allow single-element vector FP converts with +sme2p2 (#112905)
Follow up to #112213 now that the +sme2p2 feature flag has landed. The single-element vector variants of FCVTZS, FCVTZU, UCVTF, and SCVTF are allowed in streaming SVE mode with +sme2p2. Reference: - https://developer.arm.com/documentation/ddi0602/2024-09/SIMD-FP-Instructions/FCVTZS--vector--integer---Floating-point-convert-to-signed-integer--rounding-toward-zero--vector-- - https://developer.arm.com/documentation/ddi0602/2024-09/SIMD-FP-Instructions/UCVTF--vector--integer---Unsigned-integer-convert-to-floating-point--vector-- - https://developer.arm.com/documentation/ddi0602/2024-09/SIMD-FP-Instructions/SCVTF--vector--integer---Signed-integer-convert-to-floating-point--vector--
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‎llvm/lib/Target/AArch64/AArch64InstrInfo.td‎

Lines changed: 7 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -287,6 +287,10 @@ def HasSMEF16F16orSMEF8F16
287287
def HasNEONandIsStreamingSafe
288288
: Predicate<"Subtarget->hasNEON()">,
289289
AssemblerPredicateWithAll<(any_of FeatureNEON), "neon">;
290+
// A subset of NEON instructions are legal in Streaming SVE mode only with +sme2p2.
291+
def HasNEONandIsSME2p2StreamingSafe
292+
: Predicate<"Subtarget->isNeonAvailable() || (Subtarget->hasNEON() && Subtarget->hasSME2p2())">,
293+
AssemblerPredicateWithAll<(any_of FeatureNEON), "neon">;
290294
def HasRCPC : Predicate<"Subtarget->hasRCPC()">,
291295
AssemblerPredicateWithAll<(all_of FeatureRCPC), "rcpc">;
292296
def HasAltNZCV : Predicate<"Subtarget->hasAlternativeNZCV()">,
@@ -6315,8 +6319,7 @@ def : Pat<(v2f64 (AArch64frsqrts (v2f64 FPR128:$Rn), (v2f64 FPR128:$Rm))),
63156319
// Some float -> int -> float conversion patterns for which we want to keep the
63166320
// int values in FP registers using the corresponding NEON instructions to
63176321
// avoid more costly int <-> fp register transfers.
6318-
// TODO: Allow these in streaming[-compatible] functions with +sme2p2.
6319-
let Predicates = [HasNEON] in {
6322+
let Predicates = [HasNEONandIsSME2p2StreamingSafe] in {
63206323
def : Pat<(f64 (any_sint_to_fp (i64 (any_fp_to_sint f64:$Rn)))),
63216324
(SCVTFv1i64 (i64 (FCVTZSv1i64 f64:$Rn)))>;
63226325
def : Pat<(f32 (any_sint_to_fp (i32 (any_fp_to_sint f32:$Rn)))),
@@ -6326,8 +6329,7 @@ def : Pat<(f64 (any_uint_to_fp (i64 (any_fp_to_uint f64:$Rn)))),
63266329
def : Pat<(f32 (any_uint_to_fp (i32 (any_fp_to_uint f32:$Rn)))),
63276330
(UCVTFv1i32 (i32 (FCVTZUv1i32 f32:$Rn)))>;
63286331

6329-
// TODO: Allow these in streaming[-compatible] functions with +sme2p2.
6330-
let Predicates = [HasNEON, HasFullFP16] in {
6332+
let Predicates = [HasNEONandIsSME2p2StreamingSafe, HasFullFP16] in {
63316333
def : Pat<(f16 (any_sint_to_fp (i32 (any_fp_to_sint f16:$Rn)))),
63326334
(SCVTFv1i16 (f16 (FCVTZSv1f16 f16:$Rn)))>;
63336335
def : Pat<(f16 (any_uint_to_fp (i32 (any_fp_to_uint f16:$Rn)))),
@@ -6350,8 +6352,7 @@ def : Pat<(f64 (uint_to_fp (i64 (vector_extract (v2i64 FPR128:$Rn), (i64 0))))),
63506352

63516353
// fp16: integer extraction from vector must be at least 32-bits to be legal.
63526354
// Actual extraction result is then an in-reg sign-extension of lower 16-bits.
6353-
// TODO: Allow these in streaming[-compatible] functions with +sme2p2.
6354-
let Predicates = [HasNEON, HasFullFP16] in {
6355+
let Predicates = [HasNEONandIsSME2p2StreamingSafe, HasFullFP16] in {
63556356
def : Pat<(f16 (sint_to_fp (i32 (sext_inreg (i32 (vector_extract
63566357
(v8i16 FPR128:$Rn), (i64 0))), i16)))),
63576358
(SCVTFv1i16 (f16 (EXTRACT_SUBREG (v8i16 FPR128:$Rn), hsub)))>;

‎llvm/test/CodeGen/AArch64/sve-streaming-mode-cvt-fp-int-fp.ll‎

Lines changed: 36 additions & 35 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,7 @@
11
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
22
; RUN: llc -force-streaming-compatible < %s | FileCheck %s
3-
; RUN: llc < %s | FileCheck %s --check-prefix=NON-STREAMING
3+
; RUN: llc -force-streaming-compatible -mattr=+sme2p2 < %s | FileCheck %s --check-prefix=USE-NEON-NO-GPRS
4+
; RUN: llc < %s | FileCheck %s --check-prefix=USE-NEON-NO-GPRS
45

56
target triple = "aarch64-unknown-linux-gnu"
67

@@ -11,11 +12,11 @@ define double @t1(double %x) {
1112
; CHECK-NEXT: scvtf d0, x8
1213
; CHECK-NEXT: ret
1314
;
14-
; NON-STREAMING-LABEL: t1:
15-
; NON-STREAMING: // %bb.0: // %entry
16-
; NON-STREAMING-NEXT: fcvtzs d0, d0
17-
; NON-STREAMING-NEXT: scvtf d0, d0
18-
; NON-STREAMING-NEXT: ret
15+
; USE-NEON-NO-GPRS-LABEL: t1:
16+
; USE-NEON-NO-GPRS: // %bb.0: // %entry
17+
; USE-NEON-NO-GPRS-NEXT: fcvtzs d0, d0
18+
; USE-NEON-NO-GPRS-NEXT: scvtf d0, d0
19+
; USE-NEON-NO-GPRS-NEXT: ret
1920
entry:
2021
%conv = fptosi double %x to i64
2122
%conv1 = sitofp i64 %conv to double
@@ -29,11 +30,11 @@ define float @t2(float %x) {
2930
; CHECK-NEXT: scvtf s0, w8
3031
; CHECK-NEXT: ret
3132
;
32-
; NON-STREAMING-LABEL: t2:
33-
; NON-STREAMING: // %bb.0: // %entry
34-
; NON-STREAMING-NEXT: fcvtzs s0, s0
35-
; NON-STREAMING-NEXT: scvtf s0, s0
36-
; NON-STREAMING-NEXT: ret
33+
; USE-NEON-NO-GPRS-LABEL: t2:
34+
; USE-NEON-NO-GPRS: // %bb.0: // %entry
35+
; USE-NEON-NO-GPRS-NEXT: fcvtzs s0, s0
36+
; USE-NEON-NO-GPRS-NEXT: scvtf s0, s0
37+
; USE-NEON-NO-GPRS-NEXT: ret
3738
entry:
3839
%conv = fptosi float %x to i32
3940
%conv1 = sitofp i32 %conv to float
@@ -49,13 +50,13 @@ define half @t3(half %x) {
4950
; CHECK-NEXT: fcvt h0, s0
5051
; CHECK-NEXT: ret
5152
;
52-
; NON-STREAMING-LABEL: t3:
53-
; NON-STREAMING: // %bb.0: // %entry
54-
; NON-STREAMING-NEXT: fcvt s0, h0
55-
; NON-STREAMING-NEXT: fcvtzs s0, s0
56-
; NON-STREAMING-NEXT: scvtf s0, s0
57-
; NON-STREAMING-NEXT: fcvt h0, s0
58-
; NON-STREAMING-NEXT: ret
53+
; USE-NEON-NO-GPRS-LABEL: t3:
54+
; USE-NEON-NO-GPRS: // %bb.0: // %entry
55+
; USE-NEON-NO-GPRS-NEXT: fcvt s0, h0
56+
; USE-NEON-NO-GPRS-NEXT: fcvtzs s0, s0
57+
; USE-NEON-NO-GPRS-NEXT: scvtf s0, s0
58+
; USE-NEON-NO-GPRS-NEXT: fcvt h0, s0
59+
; USE-NEON-NO-GPRS-NEXT: ret
5960
entry:
6061
%conv = fptosi half %x to i32
6162
%conv1 = sitofp i32 %conv to half
@@ -69,11 +70,11 @@ define double @t4(double %x) {
6970
; CHECK-NEXT: ucvtf d0, x8
7071
; CHECK-NEXT: ret
7172
;
72-
; NON-STREAMING-LABEL: t4:
73-
; NON-STREAMING: // %bb.0: // %entry
74-
; NON-STREAMING-NEXT: fcvtzu d0, d0
75-
; NON-STREAMING-NEXT: ucvtf d0, d0
76-
; NON-STREAMING-NEXT: ret
73+
; USE-NEON-NO-GPRS-LABEL: t4:
74+
; USE-NEON-NO-GPRS: // %bb.0: // %entry
75+
; USE-NEON-NO-GPRS-NEXT: fcvtzu d0, d0
76+
; USE-NEON-NO-GPRS-NEXT: ucvtf d0, d0
77+
; USE-NEON-NO-GPRS-NEXT: ret
7778
entry:
7879
%conv = fptoui double %x to i64
7980
%conv1 = uitofp i64 %conv to double
@@ -87,11 +88,11 @@ define float @t5(float %x) {
8788
; CHECK-NEXT: ucvtf s0, w8
8889
; CHECK-NEXT: ret
8990
;
90-
; NON-STREAMING-LABEL: t5:
91-
; NON-STREAMING: // %bb.0: // %entry
92-
; NON-STREAMING-NEXT: fcvtzu s0, s0
93-
; NON-STREAMING-NEXT: ucvtf s0, s0
94-
; NON-STREAMING-NEXT: ret
91+
; USE-NEON-NO-GPRS-LABEL: t5:
92+
; USE-NEON-NO-GPRS: // %bb.0: // %entry
93+
; USE-NEON-NO-GPRS-NEXT: fcvtzu s0, s0
94+
; USE-NEON-NO-GPRS-NEXT: ucvtf s0, s0
95+
; USE-NEON-NO-GPRS-NEXT: ret
9596
entry:
9697
%conv = fptoui float %x to i32
9798
%conv1 = uitofp i32 %conv to float
@@ -107,13 +108,13 @@ define half @t6(half %x) {
107108
; CHECK-NEXT: fcvt h0, s0
108109
; CHECK-NEXT: ret
109110
;
110-
; NON-STREAMING-LABEL: t6:
111-
; NON-STREAMING: // %bb.0: // %entry
112-
; NON-STREAMING-NEXT: fcvt s0, h0
113-
; NON-STREAMING-NEXT: fcvtzu s0, s0
114-
; NON-STREAMING-NEXT: ucvtf s0, s0
115-
; NON-STREAMING-NEXT: fcvt h0, s0
116-
; NON-STREAMING-NEXT: ret
111+
; USE-NEON-NO-GPRS-LABEL: t6:
112+
; USE-NEON-NO-GPRS: // %bb.0: // %entry
113+
; USE-NEON-NO-GPRS-NEXT: fcvt s0, h0
114+
; USE-NEON-NO-GPRS-NEXT: fcvtzu s0, s0
115+
; USE-NEON-NO-GPRS-NEXT: ucvtf s0, s0
116+
; USE-NEON-NO-GPRS-NEXT: fcvt h0, s0
117+
; USE-NEON-NO-GPRS-NEXT: ret
117118
entry:
118119
%conv = fptoui half %x to i32
119120
%conv1 = uitofp i32 %conv to half

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