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lines changed Original file line number Diff line number Diff line change @@ -1807,7 +1807,7 @@ RISCVSingleStepBreakpointLocationsPredictor::GetBreakpointLocations(
18071807 Log *log = GetLog (LLDBLog::Unwind);
18081808 LLDB_LOGF (log,
18091809 " RISCVSingleStepBreakpointLocationsPredictor::%s: can't find "
1810- " corresponding load reserve insturuction " ,
1810+ " corresponding load reserve instruction " ,
18111811 __FUNCTION__);
18121812 return {*pc + (inst->is_rvc ? 2u : 4u )};
18131813 }
@@ -1839,7 +1839,7 @@ RISCVSingleStepBreakpointLocationsPredictor::HandleAtomicSequence(
18391839 EmulateInstructionRISCV *riscv_emulator =
18401840 static_cast <EmulateInstructionRISCV *>(m_emulator_up.get ());
18411841
1842- // Handle instructions between LR and SC. According to unprivilleged
1842+ // Handle instructions between LR and SC. According to unprivileged
18431843 // RISC-V ISA there can be at most 16 instructions in the sequence.
18441844
18451845 lldb::addr_t entry_pc = pc; // LR instruction address
@@ -1872,7 +1872,7 @@ RISCVSingleStepBreakpointLocationsPredictor::HandleAtomicSequence(
18721872 Log *log = GetLog (LLDBLog::Unwind);
18731873 LLDB_LOGF (log,
18741874 " RISCVSingleStepBreakpointLocationsPredictor::%s: can't find "
1875- " corresponding store conditional insturuction " ,
1875+ " corresponding store conditional instruction " ,
18761876 __FUNCTION__);
18771877 return {entry_pc + (lr_inst->is_rvc ? 2u : 4u )};
18781878 }
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