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-65
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3 files changed

+29
-65
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‎llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp‎

Lines changed: 5 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -4679,7 +4679,11 @@ struct MemorySanitizerVisitor : public InstVisitor<MemorySanitizerVisitor> {
46794679
case Intrinsic::x86_sse2_cvtps2dq:
46804680
case Intrinsic::x86_sse2_cvtpd2dq:
46814681
case Intrinsic::x86_sse2_cvttps2dq:
4682-
case Intrinsic::x86_sse2_cvttpd2dq: {
4682+
case Intrinsic::x86_sse2_cvttpd2dq:
4683+
case Intrinsic::x86_avx_cvt_ps2dq_256:
4684+
case Intrinsic::x86_avx_cvt_pd2dq_256:
4685+
case Intrinsic::x86_avx_cvtt_ps2dq_256:
4686+
case Intrinsic::x86_avx_cvtt_pd2dq_256: {
46834687
handleSSEVectorConvertIntrinsicByProp(I, /*HasRoundingMode=*/false);
46844688
break;
46854689
}

‎llvm/test/Instrumentation/MemorySanitizer/X86/avx-intrinsics-x86.ll‎

Lines changed: 12 additions & 32 deletions
Original file line numberDiff line numberDiff line change
@@ -324,15 +324,10 @@ define <4 x i32> @test_x86_avx_cvt_pd2dq_256(<4 x double> %a0) #0 {
324324
; CHECK-LABEL: @test_x86_avx_cvt_pd2dq_256(
325325
; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i64>, ptr @__msan_param_tls, align 8
326326
; CHECK-NEXT: call void @llvm.donothing()
327-
; CHECK-NEXT: [[TMP2:%.*]] = bitcast <4 x i64> [[TMP1]] to i256
328-
; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i256 [[TMP2]], 0
329-
; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP3:%.*]], label [[TMP4:%.*]], !prof [[PROF1]]
330-
; CHECK: 3:
331-
; CHECK-NEXT: call void @__msan_warning_noreturn()
332-
; CHECK-NEXT: unreachable
333-
; CHECK: 4:
327+
; CHECK-NEXT: [[TMP2:%.*]] = icmp ne <4 x i64> [[TMP1]], zeroinitializer
328+
; CHECK-NEXT: [[TMP3:%.*]] = sext <4 x i1> [[TMP2]] to <4 x i32>
334329
; CHECK-NEXT: [[RES:%.*]] = call <4 x i32> @llvm.x86.avx.cvt.pd2dq.256(<4 x double> [[A0:%.*]])
335-
; CHECK-NEXT: store <4 x i32> zeroinitializer, ptr @__msan_retval_tls, align 8
330+
; CHECK-NEXT: store <4 x i32> [[TMP3]], ptr @__msan_retval_tls, align 8
336331
; CHECK-NEXT: ret <4 x i32> [[RES]]
337332
;
338333
%res = call <4 x i32> @llvm.x86.avx.cvt.pd2dq.256(<4 x double> %a0) ; <<4 x i32>> [#uses=1]
@@ -345,15 +340,10 @@ define <8 x i32> @test_x86_avx_cvt_ps2dq_256(<8 x float> %a0) #0 {
345340
; CHECK-LABEL: @test_x86_avx_cvt_ps2dq_256(
346341
; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i32>, ptr @__msan_param_tls, align 8
347342
; CHECK-NEXT: call void @llvm.donothing()
348-
; CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i32> [[TMP1]] to i256
349-
; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i256 [[TMP2]], 0
350-
; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP3:%.*]], label [[TMP4:%.*]], !prof [[PROF1]]
351-
; CHECK: 3:
352-
; CHECK-NEXT: call void @__msan_warning_noreturn()
353-
; CHECK-NEXT: unreachable
354-
; CHECK: 4:
343+
; CHECK-NEXT: [[TMP2:%.*]] = icmp ne <8 x i32> [[TMP1]], zeroinitializer
344+
; CHECK-NEXT: [[TMP3:%.*]] = sext <8 x i1> [[TMP2]] to <8 x i32>
355345
; CHECK-NEXT: [[RES:%.*]] = call <8 x i32> @llvm.x86.avx.cvt.ps2dq.256(<8 x float> [[A0:%.*]])
356-
; CHECK-NEXT: store <8 x i32> zeroinitializer, ptr @__msan_retval_tls, align 8
346+
; CHECK-NEXT: store <8 x i32> [[TMP3]], ptr @__msan_retval_tls, align 8
357347
; CHECK-NEXT: ret <8 x i32> [[RES]]
358348
;
359349
%res = call <8 x i32> @llvm.x86.avx.cvt.ps2dq.256(<8 x float> %a0) ; <<8 x i32>> [#uses=1]
@@ -366,15 +356,10 @@ define <4 x i32> @test_x86_avx_cvtt_pd2dq_256(<4 x double> %a0) #0 {
366356
; CHECK-LABEL: @test_x86_avx_cvtt_pd2dq_256(
367357
; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i64>, ptr @__msan_param_tls, align 8
368358
; CHECK-NEXT: call void @llvm.donothing()
369-
; CHECK-NEXT: [[TMP2:%.*]] = bitcast <4 x i64> [[TMP1]] to i256
370-
; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i256 [[TMP2]], 0
371-
; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP3:%.*]], label [[TMP4:%.*]], !prof [[PROF1]]
372-
; CHECK: 3:
373-
; CHECK-NEXT: call void @__msan_warning_noreturn()
374-
; CHECK-NEXT: unreachable
375-
; CHECK: 4:
359+
; CHECK-NEXT: [[TMP2:%.*]] = icmp ne <4 x i64> [[TMP1]], zeroinitializer
360+
; CHECK-NEXT: [[TMP3:%.*]] = sext <4 x i1> [[TMP2]] to <4 x i32>
376361
; CHECK-NEXT: [[RES:%.*]] = call <4 x i32> @llvm.x86.avx.cvtt.pd2dq.256(<4 x double> [[A0:%.*]])
377-
; CHECK-NEXT: store <4 x i32> zeroinitializer, ptr @__msan_retval_tls, align 8
362+
; CHECK-NEXT: store <4 x i32> [[TMP3]], ptr @__msan_retval_tls, align 8
378363
; CHECK-NEXT: ret <4 x i32> [[RES]]
379364
;
380365
%res = call <4 x i32> @llvm.x86.avx.cvtt.pd2dq.256(<4 x double> %a0) ; <<4 x i32>> [#uses=1]
@@ -387,15 +372,10 @@ define <8 x i32> @test_x86_avx_cvtt_ps2dq_256(<8 x float> %a0) #0 {
387372
; CHECK-LABEL: @test_x86_avx_cvtt_ps2dq_256(
388373
; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i32>, ptr @__msan_param_tls, align 8
389374
; CHECK-NEXT: call void @llvm.donothing()
390-
; CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i32> [[TMP1]] to i256
391-
; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i256 [[TMP2]], 0
392-
; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP3:%.*]], label [[TMP4:%.*]], !prof [[PROF1]]
393-
; CHECK: 3:
394-
; CHECK-NEXT: call void @__msan_warning_noreturn()
395-
; CHECK-NEXT: unreachable
396-
; CHECK: 4:
375+
; CHECK-NEXT: [[TMP2:%.*]] = icmp ne <8 x i32> [[TMP1]], zeroinitializer
376+
; CHECK-NEXT: [[TMP3:%.*]] = sext <8 x i1> [[TMP2]] to <8 x i32>
397377
; CHECK-NEXT: [[RES:%.*]] = call <8 x i32> @llvm.x86.avx.cvtt.ps2dq.256(<8 x float> [[A0:%.*]])
398-
; CHECK-NEXT: store <8 x i32> zeroinitializer, ptr @__msan_retval_tls, align 8
378+
; CHECK-NEXT: store <8 x i32> [[TMP3]], ptr @__msan_retval_tls, align 8
399379
; CHECK-NEXT: ret <8 x i32> [[RES]]
400380
;
401381
%res = call <8 x i32> @llvm.x86.avx.cvtt.ps2dq.256(<8 x float> %a0) ; <<8 x i32>> [#uses=1]

‎llvm/test/Instrumentation/MemorySanitizer/i386/avx-intrinsics-i386.ll‎

Lines changed: 12 additions & 32 deletions
Original file line numberDiff line numberDiff line change
@@ -333,15 +333,10 @@ define <4 x i32> @test_x86_avx_cvt_pd2dq_256(<4 x double> %a0) #0 {
333333
; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i64>, ptr @__msan_param_tls, align 8
334334
; CHECK-NEXT: [[TMP4:%.*]] = load i64, ptr @__msan_va_arg_overflow_size_tls, align 8
335335
; CHECK-NEXT: call void @llvm.donothing()
336-
; CHECK-NEXT: [[TMP2:%.*]] = bitcast <4 x i64> [[TMP1]] to i256
337-
; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i256 [[TMP2]], 0
338-
; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP6:%.*]], label [[TMP5:%.*]], !prof [[PROF1]]
339-
; CHECK: 4:
340-
; CHECK-NEXT: call void @__msan_warning_noreturn()
341-
; CHECK-NEXT: unreachable
342-
; CHECK: 5:
336+
; CHECK-NEXT: [[TMP3:%.*]] = icmp ne <4 x i64> [[TMP1]], zeroinitializer
337+
; CHECK-NEXT: [[TMP5:%.*]] = sext <4 x i1> [[TMP3]] to <4 x i32>
343338
; CHECK-NEXT: [[RES:%.*]] = call <4 x i32> @llvm.x86.avx.cvt.pd2dq.256(<4 x double> [[A0:%.*]])
344-
; CHECK-NEXT: store <4 x i32> zeroinitializer, ptr @__msan_retval_tls, align 8
339+
; CHECK-NEXT: store <4 x i32> [[TMP5]], ptr @__msan_retval_tls, align 8
345340
; CHECK-NEXT: ret <4 x i32> [[RES]]
346341
;
347342
%res = call <4 x i32> @llvm.x86.avx.cvt.pd2dq.256(<4 x double> %a0) ; <<4 x i32>> [#uses=1]
@@ -355,15 +350,10 @@ define <8 x i32> @test_x86_avx_cvt_ps2dq_256(<8 x float> %a0) #0 {
355350
; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i32>, ptr @__msan_param_tls, align 8
356351
; CHECK-NEXT: [[TMP4:%.*]] = load i64, ptr @__msan_va_arg_overflow_size_tls, align 8
357352
; CHECK-NEXT: call void @llvm.donothing()
358-
; CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i32> [[TMP1]] to i256
359-
; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i256 [[TMP2]], 0
360-
; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP6:%.*]], label [[TMP5:%.*]], !prof [[PROF1]]
361-
; CHECK: 4:
362-
; CHECK-NEXT: call void @__msan_warning_noreturn()
363-
; CHECK-NEXT: unreachable
364-
; CHECK: 5:
353+
; CHECK-NEXT: [[TMP3:%.*]] = icmp ne <8 x i32> [[TMP1]], zeroinitializer
354+
; CHECK-NEXT: [[TMP5:%.*]] = sext <8 x i1> [[TMP3]] to <8 x i32>
365355
; CHECK-NEXT: [[RES:%.*]] = call <8 x i32> @llvm.x86.avx.cvt.ps2dq.256(<8 x float> [[A0:%.*]])
366-
; CHECK-NEXT: store <8 x i32> zeroinitializer, ptr @__msan_retval_tls, align 8
356+
; CHECK-NEXT: store <8 x i32> [[TMP5]], ptr @__msan_retval_tls, align 8
367357
; CHECK-NEXT: ret <8 x i32> [[RES]]
368358
;
369359
%res = call <8 x i32> @llvm.x86.avx.cvt.ps2dq.256(<8 x float> %a0) ; <<8 x i32>> [#uses=1]
@@ -377,15 +367,10 @@ define <4 x i32> @test_x86_avx_cvtt_pd2dq_256(<4 x double> %a0) #0 {
377367
; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i64>, ptr @__msan_param_tls, align 8
378368
; CHECK-NEXT: [[TMP4:%.*]] = load i64, ptr @__msan_va_arg_overflow_size_tls, align 8
379369
; CHECK-NEXT: call void @llvm.donothing()
380-
; CHECK-NEXT: [[TMP2:%.*]] = bitcast <4 x i64> [[TMP1]] to i256
381-
; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i256 [[TMP2]], 0
382-
; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP6:%.*]], label [[TMP5:%.*]], !prof [[PROF1]]
383-
; CHECK: 4:
384-
; CHECK-NEXT: call void @__msan_warning_noreturn()
385-
; CHECK-NEXT: unreachable
386-
; CHECK: 5:
370+
; CHECK-NEXT: [[TMP3:%.*]] = icmp ne <4 x i64> [[TMP1]], zeroinitializer
371+
; CHECK-NEXT: [[TMP5:%.*]] = sext <4 x i1> [[TMP3]] to <4 x i32>
387372
; CHECK-NEXT: [[RES:%.*]] = call <4 x i32> @llvm.x86.avx.cvtt.pd2dq.256(<4 x double> [[A0:%.*]])
388-
; CHECK-NEXT: store <4 x i32> zeroinitializer, ptr @__msan_retval_tls, align 8
373+
; CHECK-NEXT: store <4 x i32> [[TMP5]], ptr @__msan_retval_tls, align 8
389374
; CHECK-NEXT: ret <4 x i32> [[RES]]
390375
;
391376
%res = call <4 x i32> @llvm.x86.avx.cvtt.pd2dq.256(<4 x double> %a0) ; <<4 x i32>> [#uses=1]
@@ -399,15 +384,10 @@ define <8 x i32> @test_x86_avx_cvtt_ps2dq_256(<8 x float> %a0) #0 {
399384
; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i32>, ptr @__msan_param_tls, align 8
400385
; CHECK-NEXT: [[TMP4:%.*]] = load i64, ptr @__msan_va_arg_overflow_size_tls, align 8
401386
; CHECK-NEXT: call void @llvm.donothing()
402-
; CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i32> [[TMP1]] to i256
403-
; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i256 [[TMP2]], 0
404-
; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP6:%.*]], label [[TMP5:%.*]], !prof [[PROF1]]
405-
; CHECK: 4:
406-
; CHECK-NEXT: call void @__msan_warning_noreturn()
407-
; CHECK-NEXT: unreachable
408-
; CHECK: 5:
387+
; CHECK-NEXT: [[TMP3:%.*]] = icmp ne <8 x i32> [[TMP1]], zeroinitializer
388+
; CHECK-NEXT: [[TMP5:%.*]] = sext <8 x i1> [[TMP3]] to <8 x i32>
409389
; CHECK-NEXT: [[RES:%.*]] = call <8 x i32> @llvm.x86.avx.cvtt.ps2dq.256(<8 x float> [[A0:%.*]])
410-
; CHECK-NEXT: store <8 x i32> zeroinitializer, ptr @__msan_retval_tls, align 8
390+
; CHECK-NEXT: store <8 x i32> [[TMP5]], ptr @__msan_retval_tls, align 8
411391
; CHECK-NEXT: ret <8 x i32> [[RES]]
412392
;
413393
%res = call <8 x i32> @llvm.x86.avx.cvtt.ps2dq.256(<8 x float> %a0) ; <<8 x i32>> [#uses=1]

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