review2

Author: MalaySanghi

clang/lib/Headers/amxmovrstransposeintrin.h

@@ -1,5 +1,4 @@
-/* ===--- amxmovrstransposeintrin.h - AMX_MOVRS_TRANSPOSE intrinsics -*- C++
- * -*---------===
+/* ===--- amxmovrstransposeintrin.h - AMX_MOVRS_TRANSPOSE intrinsics --------===
  *
  * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
  * See https://llvm.org/LICENSE.txt for license information.

clang/lib/Headers/immintrin.h

@@ -658,6 +658,10 @@ _storebe_i64(void * __P, long long __D) {
 
 #if !defined(__SCE__) || __has_feature(modules) || defined(__AMX_MOVRS__)
 #include <amxmovrsintrin.h>
+#endif
+
+#if !defined(__SCE__) || __has_feature(modules) ||                             \
+    (defined(__AMX_MOVRS__) && defined(__AMX_TRANSPOSE__))
 #include <amxmovrstransposeintrin.h>
 #endif
 

clang/test/CodeGen/X86/amx_movrs_errors.c

@@ -1,7 +1,6 @@
 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4
 // RUN: %clang_cc1 %s -ffreestanding -triple=x86_64-unknown-unknown \
-// RUN: -target-feature +amx-int8 -target-feature +amx-bf16 \
-// RUN: -target-feature +amx-element -verify
+// RUN: -target-feature +amx-movrs -verify
 
 #include <immintrin.h>
 #include <stddef.h>

llvm/lib/Target/X86/X86.td

@@ -274,8 +274,8 @@ def FeatureAMXFP8 : SubtargetFeature<"amx-fp8", "HasAMXFP8", "true",
                                      "Support AMX-FP8 instructions",
                                      [FeatureAMXTILE]>;
 def FeatureAMXMOVRS : SubtargetFeature<"amx-movrs", "HasAMXMOVRS", "true",
-                                     "Support AMX-MOVRS instructions",
-                                     [FeatureAMXTILE]>;
+                                       "Support AMX-MOVRS instructions",
+                                       [FeatureAMXTILE]>;
 def FeatureAMXTRANSPOSE : SubtargetFeature<"amx-transpose", "HasAMXTRANSPOSE", "true",
                                            "Support AMX amx-transpose instructions",
                                            [FeatureAMXTILE]>;

llvm/lib/Target/X86/X86ISelDAGToDAG.cpp

@@ -5343,7 +5343,7 @@ void X86DAGToDAGISel::Select(SDNode *Node) {
     case Intrinsic::x86_t2rpntlvwz0rst1:
     case Intrinsic::x86_t2rpntlvwz1rs:
     case Intrinsic::x86_t2rpntlvwz1rst1:
-      if (!Subtarget->hasAMXTRANSPOSE() || !Subtarget->hasAMXMOVRS())
+      if (!Subtarget->hasAMXMOVRS())
         break;
       [[fallthrough]];
     case Intrinsic::x86_t2rpntlvwz0:

llvm/lib/Target/X86/X86InstrAMX.td

@@ -419,18 +419,17 @@ let Predicates = [HasAMXMOVRS, In64BitMode], SchedRW = [WriteSystem] in {
                     "tileloaddrst1\t{$src1, $dst|$dst, $src1}",
                     []>, VEX, T8, PD;
 
-  let isPseudo = true, mayLoad = 1 in
-  def PTILELOADDRSV : PseudoI<(outs TILE:$dst), (ins GR16:$src1,
-                                                GR16:$src2,
-                                                opaquemem:$src3), []>;
-  let isPseudo = true, mayLoad = 1 in
-  def PTILELOADDRST1V : PseudoI<(outs TILE:$dst), (ins GR16:$src1,
+  let isPseudo = true, mayLoad = 1 in {
+    def PTILELOADDRSV : PseudoI<(outs TILE:$dst), (ins GR16:$src1,
                                                   GR16:$src2,
                                                   opaquemem:$src3), []>;
-  let  usesCustomInserter = 1 in {
-    let mayLoad = 1 in
+    def PTILELOADDRST1V : PseudoI<(outs TILE:$dst), (ins GR16:$src1,
+                                                    GR16:$src2,
+                                                    opaquemem:$src3), []>;
+  }
+
+  let usesCustomInserter = 1, mayLoad = 1 in {
     def PTILELOADDRS : PseudoI<(outs), (ins u8imm:$src1, sibmem:$src2), []>;
-    let mayLoad = 1 in
     def PTILELOADDRST1 : PseudoI<(outs), (ins u8imm:$src1, sibmem:$src2), []>;
   }
 } // HasAMXMOVRS, In64BitMode

llvm/lib/TargetParser/Host.cpp

@@ -1880,9 +1880,9 @@ const StringMap<bool> sys::getHostCPUFeatures() {
                    !getX86CpuIDAndInfoEx(0x1e, 0x1, &EAX, &EBX, &ECX, &EDX);
   Features["amx-fp8"] = HasLeaf1E && ((EAX >> 4) & 1) && HasAMXSave;
   Features["amx-transpose"] = HasLeaf1E && ((EAX >> 5) & 1) && HasAMXSave;
-  Features["amx-movrs"] = HasLeaf1E && ((EAX >> 8) & 1) && HasAMXSave;
   Features["amx-tf32"] = HasLeaf1E && ((EAX >> 6) & 1) && HasAMXSave;
   Features["amx-avx512"] = HasLeaf1E && ((EAX >> 7) & 1) && HasAMXSave;
+  Features["amx-movrs"] = HasLeaf1E && ((EAX >> 8) & 1) && HasAMXSave;
 
   bool HasLeaf24 =
       MaxLevel >= 0x24 && !getX86CpuIDAndInfo(0x24, &EAX, &EBX, &ECX, &EDX);