@@ -18929,22 +18929,15 @@ Value *CodeGenFunction::EmitAMDGPUBuiltinExpr(unsigned BuiltinID,
1892918929 Function *F = CGM.getIntrinsic(Intrin, { Src0->getType() });
1893018930 return Builder.CreateCall(F, { Src0, Builder.getFalse() });
1893118931 }
18932- case AMDGPU::BI__builtin_amdgcn_global_atomic_fadd_v2f16:
1893318932 case AMDGPU::BI__builtin_amdgcn_global_atomic_fmin_f64:
1893418933 case AMDGPU::BI__builtin_amdgcn_global_atomic_fmax_f64:
1893518934 case AMDGPU::BI__builtin_amdgcn_flat_atomic_fadd_f64:
1893618935 case AMDGPU::BI__builtin_amdgcn_flat_atomic_fmin_f64:
1893718936 case AMDGPU::BI__builtin_amdgcn_flat_atomic_fmax_f64:
18938- case AMDGPU::BI__builtin_amdgcn_flat_atomic_fadd_f32:
18939- case AMDGPU::BI__builtin_amdgcn_flat_atomic_fadd_v2f16: {
18937+ case AMDGPU::BI__builtin_amdgcn_flat_atomic_fadd_f32: {
1894018938 Intrinsic::ID IID;
1894118939 llvm::Type *ArgTy = llvm::Type::getDoubleTy(getLLVMContext());
1894218940 switch (BuiltinID) {
18943- case AMDGPU::BI__builtin_amdgcn_global_atomic_fadd_v2f16:
18944- ArgTy = llvm::FixedVectorType::get(
18945- llvm::Type::getHalfTy(getLLVMContext()), 2);
18946- IID = Intrinsic::amdgcn_global_atomic_fadd;
18947- break;
1894818941 case AMDGPU::BI__builtin_amdgcn_global_atomic_fmin_f64:
1894918942 IID = Intrinsic::amdgcn_global_atomic_fmin;
1895018943 break;
@@ -18964,11 +18957,6 @@ Value *CodeGenFunction::EmitAMDGPUBuiltinExpr(unsigned BuiltinID,
1896418957 ArgTy = llvm::Type::getFloatTy(getLLVMContext());
1896518958 IID = Intrinsic::amdgcn_flat_atomic_fadd;
1896618959 break;
18967- case AMDGPU::BI__builtin_amdgcn_flat_atomic_fadd_v2f16:
18968- ArgTy = llvm::FixedVectorType::get(
18969- llvm::Type::getHalfTy(getLLVMContext()), 2);
18970- IID = Intrinsic::amdgcn_flat_atomic_fadd;
18971- break;
1897218960 }
1897318961 llvm::Value *Addr = EmitScalarExpr(E->getArg(0));
1897418962 llvm::Value *Val = EmitScalarExpr(E->getArg(1));
@@ -19369,7 +19357,9 @@ Value *CodeGenFunction::EmitAMDGPUBuiltinExpr(unsigned BuiltinID,
1936919357 case AMDGPU::BI__builtin_amdgcn_ds_fminf:
1937019358 case AMDGPU::BI__builtin_amdgcn_ds_fmaxf:
1937119359 case AMDGPU::BI__builtin_amdgcn_global_atomic_fadd_f32:
19372- case AMDGPU::BI__builtin_amdgcn_global_atomic_fadd_f64: {
19360+ case AMDGPU::BI__builtin_amdgcn_global_atomic_fadd_f64:
19361+ case AMDGPU::BI__builtin_amdgcn_global_atomic_fadd_v2f16:
19362+ case AMDGPU::BI__builtin_amdgcn_flat_atomic_fadd_v2f16: {
1937319363 llvm::AtomicRMWInst::BinOp BinOp;
1937419364 switch (BuiltinID) {
1937519365 case AMDGPU::BI__builtin_amdgcn_atomic_inc32:
@@ -19387,6 +19377,8 @@ Value *CodeGenFunction::EmitAMDGPUBuiltinExpr(unsigned BuiltinID,
1938719377 case AMDGPU::BI__builtin_amdgcn_ds_atomic_fadd_v2bf16:
1938819378 case AMDGPU::BI__builtin_amdgcn_global_atomic_fadd_f32:
1938919379 case AMDGPU::BI__builtin_amdgcn_global_atomic_fadd_f64:
19380+ case AMDGPU::BI__builtin_amdgcn_global_atomic_fadd_v2f16:
19381+ case AMDGPU::BI__builtin_amdgcn_flat_atomic_fadd_v2f16:
1939019382 BinOp = llvm::AtomicRMWInst::FAdd;
1939119383 break;
1939219384 case AMDGPU::BI__builtin_amdgcn_ds_fminf:
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