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Use non-const addrspace
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llvm/test/CodeGen/NVPTX/lower-args.ll

Lines changed: 5 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -2,7 +2,7 @@
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; RUN: opt < %s -S -nvptx-lower-args --mtriple nvptx64-nvidia-nvcl | FileCheck %s --check-prefixes COMMON,IR,IRO
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; RUN: llc < %s -mcpu=sm_52 --mtriple nvptx64-nvidia-cuda | FileCheck %s --check-prefixes COMMON,PTX,PTXC
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; RUN: llc < %s -mcpu=sm_52 --mtriple nvptx64-nvidia-nvcl| FileCheck %s --check-prefixes COMMON,PTX,PTXO
5-
; RUN: %if ptxas %{ llc < %s -mcpu=sm_52 | %ptxas -arch=sm_52 - %}
5+
; RUN: %if ptxas %{ llc < %s -mcpu=sm_52 | %ptxas-verify %}
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target datalayout = "e-i64:64-i128:128-v16:16-v32:32-n16:32:64"
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target triple = "nvptx64-nvidia-cuda"
@@ -87,12 +87,12 @@ define ptx_kernel void @ptr_generic(ptr %out, ptr %in) {
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}
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; COMMON-LABEL: ptr_nongeneric
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define ptx_kernel void @ptr_nongeneric(ptr addrspace(1) %out, ptr addrspace(4) %in) {
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define ptx_kernel void @ptr_nongeneric(ptr addrspace(1) %out, ptr addrspace(3) %in) {
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; IR-NOT: addrspacecast
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; PTX-NOT: cvta.to.global
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; PTX: ld.const.u32
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; PTX: ld.shared.u32
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; PTX st.global.u32
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%v = load i32, ptr addrspace(4) %in, align 4
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%v = load i32, ptr addrspace(3) %in, align 4
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store i32 %v, ptr addrspace(1) %out, align 4
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ret void
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}
@@ -145,6 +145,4 @@ define ptx_kernel void @ptr_as_int_aggr(ptr nocapture noundef readonly byval(%st
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; Function Attrs: convergent nounwind
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define dso_local ptr @escape(ptr) local_unnamed_addr {
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ret ptr %0
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}
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declare dso_local ptr @escape(ptr) local_unnamed_addr

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