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AMDGPU: Remove MTBUF instructions from gfx1250 support (#145563)
1 parent cd46354 commit ce4d214

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4 files changed

+70
-11
lines changed

4 files changed

+70
-11
lines changed

‎llvm/lib/Target/AMDGPU/AMDGPU.td‎

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2354,6 +2354,9 @@ def D16PreservesUnusedBits :
23542354
def LDSRequiresM0Init : Predicate<"Subtarget->ldsRequiresM0Init()">;
23552355
def NotLDSRequiresM0Init : Predicate<"!Subtarget->ldsRequiresM0Init()">;
23562356

2357+
def HasMTBUFInsts : Predicate<"Subtarget->hasMTBUFInsts()">,
2358+
AssemblerPredicate<(all_of (not FeatureGFX1250Insts))>;
2359+
23572360
def HasExportInsts : Predicate<"Subtarget->hasExportInsts()">,
23582361
AssemblerPredicate<(all_of (not FeatureGFX90AInsts))>;
23592362

‎llvm/lib/Target/AMDGPU/BUFInstructions.td‎

Lines changed: 16 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -1232,7 +1232,7 @@ defm BUFFER_ATOMIC_PK_ADD_BF16 : MUBUF_Pseudo_Atomics <
12321232
//===----------------------------------------------------------------------===//
12331233
// MTBUF Instructions
12341234
//===----------------------------------------------------------------------===//
1235-
1235+
let OtherPredicates = [HasMTBUFInsts] in {
12361236
defm TBUFFER_LOAD_FORMAT_X : MTBUF_Pseudo_Loads <"tbuffer_load_format_x", VGPR_32, 1>;
12371237
defm TBUFFER_LOAD_FORMAT_XY : MTBUF_Pseudo_Loads <"tbuffer_load_format_xy", VReg_64, 2>;
12381238
defm TBUFFER_LOAD_FORMAT_XYZ : MTBUF_Pseudo_Loads <"tbuffer_load_format_xyz", VReg_96, 3>;
@@ -1267,6 +1267,7 @@ let TiedSourceNotRead = 1 in {
12671267
defm TBUFFER_STORE_FORMAT_D16_XYZ : MTBUF_Pseudo_Stores <"tbuffer_store_format_d16_xyz", VReg_64, 3>;
12681268
defm TBUFFER_STORE_FORMAT_D16_XYZW : MTBUF_Pseudo_Stores <"tbuffer_store_format_d16_xyzw", VReg_64, 4>;
12691269
} // End HasPackedD16VMem.
1270+
} // End HasMTBUFInsts.
12701271

12711272
let SubtargetPredicate = isGFX7Plus in {
12721273

@@ -2188,12 +2189,13 @@ multiclass MTBUF_LoadIntrinsicPat_Common<SDPatternOperator name, ValueType vt,
21882189

21892190
multiclass MTBUF_LoadIntrinsicPat<SDPatternOperator name, ValueType vt,
21902191
string opcode, ValueType memoryVt = vt> {
2191-
let OtherPredicates = [HasUnrestrictedSOffset] in {
2192+
let SubtargetPredicate = HasUnrestrictedSOffset in {
21922193
defm : MTBUF_LoadIntrinsicPat_Common<name, vt, opcode, memoryVt>;
21932194
}
21942195
defm : MTBUF_LoadIntrinsicPat_Common<name, vt, opcode # "_VBUFFER", memoryVt>;
21952196
}
21962197

2198+
let OtherPredicates = [HasMTBUFInsts] in {
21972199
defm : MTBUF_LoadIntrinsicPat<SItbuffer_load, i32, "TBUFFER_LOAD_FORMAT_X">;
21982200
defm : MTBUF_LoadIntrinsicPat<SItbuffer_load, v2i32, "TBUFFER_LOAD_FORMAT_XY">;
21992201
defm : MTBUF_LoadIntrinsicPat<SItbuffer_load, v3i32, "TBUFFER_LOAD_FORMAT_XYZ">;
@@ -2202,22 +2204,23 @@ defm : MTBUF_LoadIntrinsicPat<SItbuffer_load, f32, "TBUFFER_LOAD_FORMAT_X">;
22022204
defm : MTBUF_LoadIntrinsicPat<SItbuffer_load, v2f32, "TBUFFER_LOAD_FORMAT_XY">;
22032205
defm : MTBUF_LoadIntrinsicPat<SItbuffer_load, v3f32, "TBUFFER_LOAD_FORMAT_XYZ">;
22042206
defm : MTBUF_LoadIntrinsicPat<SItbuffer_load, v4f32, "TBUFFER_LOAD_FORMAT_XYZW">;
2207+
} // End HasMTBUFInsts.
22052208

2206-
let SubtargetPredicate = HasUnpackedD16VMem in {
2209+
let OtherPredicates = [HasUnpackedD16VMem,HasMTBUFInsts] in {
22072210
defm : MTBUF_LoadIntrinsicPat_Common<SItbuffer_load_d16, f16, "TBUFFER_LOAD_FORMAT_D16_X_gfx80">;
22082211
defm : MTBUF_LoadIntrinsicPat_Common<SItbuffer_load_d16, i32, "TBUFFER_LOAD_FORMAT_D16_X_gfx80">;
22092212
defm : MTBUF_LoadIntrinsicPat_Common<SItbuffer_load_d16, v2i32, "TBUFFER_LOAD_FORMAT_D16_XY_gfx80">;
22102213
defm : MTBUF_LoadIntrinsicPat_Common<SItbuffer_load_d16, v3i32, "TBUFFER_LOAD_FORMAT_D16_XYZ_gfx80">;
22112214
defm : MTBUF_LoadIntrinsicPat_Common<SItbuffer_load_d16, v4i32, "TBUFFER_LOAD_FORMAT_D16_XYZW_gfx80">;
2212-
} // End HasUnpackedD16VMem.
2215+
} // End HasUnpackedD16VMem,HasMTBUFInsts.
22132216

2214-
let SubtargetPredicate = HasPackedD16VMem in {
2217+
let OtherPredicates = [HasPackedD16VMem,HasMTBUFInsts] in {
22152218
defm : MTBUF_LoadIntrinsicPat<SItbuffer_load_d16, f16, "TBUFFER_LOAD_FORMAT_D16_X">;
22162219
defm : MTBUF_LoadIntrinsicPat<SItbuffer_load_d16, i32, "TBUFFER_LOAD_FORMAT_D16_X">;
22172220
defm : MTBUF_LoadIntrinsicPat<SItbuffer_load_d16, v2f16, "TBUFFER_LOAD_FORMAT_D16_XY">;
22182221
defm : MTBUF_LoadIntrinsicPat<SItbuffer_load_d16, v4f16, "TBUFFER_LOAD_FORMAT_D16_XYZ", v3f16>;
22192222
defm : MTBUF_LoadIntrinsicPat<SItbuffer_load_d16, v4f16, "TBUFFER_LOAD_FORMAT_D16_XYZW">;
2220-
} // End HasPackedD16VMem.
2223+
} // End HasPackedD16VMem,HasMTBUFInsts.
22212224

22222225
multiclass MTBUF_StoreIntrinsicPat_Common<SDPatternOperator name, ValueType vt,
22232226
string opcode, ValueType memoryVt = vt> {
@@ -2260,12 +2263,13 @@ multiclass MTBUF_StoreIntrinsicPat_Common<SDPatternOperator name, ValueType vt,
22602263

22612264
multiclass MTBUF_StoreIntrinsicPat<SDPatternOperator name, ValueType vt,
22622265
string opcode, ValueType memoryVt = vt> {
2263-
let OtherPredicates = [HasUnrestrictedSOffset] in {
2266+
let SubtargetPredicate = HasUnrestrictedSOffset in {
22642267
defm : MTBUF_StoreIntrinsicPat_Common<name, vt, opcode, memoryVt>;
22652268
}
22662269
defm : MTBUF_StoreIntrinsicPat_Common<name, vt, opcode # "_VBUFFER", memoryVt>;
22672270
}
22682271

2272+
let OtherPredicates = [HasMTBUFInsts] in {
22692273
defm : MTBUF_StoreIntrinsicPat<SItbuffer_store, i32, "TBUFFER_STORE_FORMAT_X">;
22702274
defm : MTBUF_StoreIntrinsicPat<SItbuffer_store, v2i32, "TBUFFER_STORE_FORMAT_XY">;
22712275
defm : MTBUF_StoreIntrinsicPat<SItbuffer_store, v3i32, "TBUFFER_STORE_FORMAT_XYZ">;
@@ -2274,22 +2278,23 @@ defm : MTBUF_StoreIntrinsicPat<SItbuffer_store, f32, "TBUFFER_STORE_FORMAT_X">
22742278
defm : MTBUF_StoreIntrinsicPat<SItbuffer_store, v2f32, "TBUFFER_STORE_FORMAT_XY">;
22752279
defm : MTBUF_StoreIntrinsicPat<SItbuffer_store, v3f32, "TBUFFER_STORE_FORMAT_XYZ">;
22762280
defm : MTBUF_StoreIntrinsicPat<SItbuffer_store, v4f32, "TBUFFER_STORE_FORMAT_XYZW">;
2281+
} // End HasMTBUFInsts.
22772282

2278-
let SubtargetPredicate = HasUnpackedD16VMem in {
2283+
let OtherPredicates = [HasUnpackedD16VMem,HasMTBUFInsts] in {
22792284
defm : MTBUF_StoreIntrinsicPat_Common<SItbuffer_store_d16, f16, "TBUFFER_STORE_FORMAT_D16_X_gfx80">;
22802285
defm : MTBUF_StoreIntrinsicPat_Common<SItbuffer_store_d16, i32, "TBUFFER_STORE_FORMAT_D16_X_gfx80">;
22812286
defm : MTBUF_StoreIntrinsicPat_Common<SItbuffer_store_d16, v2i32, "TBUFFER_STORE_FORMAT_D16_XY_gfx80">;
22822287
defm : MTBUF_StoreIntrinsicPat_Common<SItbuffer_store_d16, v3i32, "TBUFFER_STORE_FORMAT_D16_XYZ_gfx80">;
22832288
defm : MTBUF_StoreIntrinsicPat_Common<SItbuffer_store_d16, v4i32, "TBUFFER_STORE_FORMAT_D16_XYZW_gfx80">;
2284-
} // End HasUnpackedD16VMem.
2289+
} // End HasUnpackedD16VMem,HasMTBUFInsts.
22852290

2286-
let SubtargetPredicate = HasPackedD16VMem in {
2291+
let OtherPredicates = [HasPackedD16VMem,HasMTBUFInsts] in {
22872292
defm : MTBUF_StoreIntrinsicPat<SItbuffer_store_d16, f16, "TBUFFER_STORE_FORMAT_D16_X">;
22882293
defm : MTBUF_StoreIntrinsicPat<SItbuffer_store_d16, i32, "TBUFFER_STORE_FORMAT_D16_X">;
22892294
defm : MTBUF_StoreIntrinsicPat<SItbuffer_store_d16, v2f16, "TBUFFER_STORE_FORMAT_D16_XY">;
22902295
defm : MTBUF_StoreIntrinsicPat<SItbuffer_store_d16, v4f16, "TBUFFER_STORE_FORMAT_D16_XYZ", v3f16>;
22912296
defm : MTBUF_StoreIntrinsicPat<SItbuffer_store_d16, v4f16, "TBUFFER_STORE_FORMAT_D16_XYZW">;
2292-
} // End HasPackedD16VMem.
2297+
} // End HasPackedD16VMem,HasMTBUFInsts.
22932298

22942299
//===----------------------------------------------------------------------===//
22952300
// Target-specific instruction encodings.

‎llvm/lib/Target/AMDGPU/GCNSubtarget.h‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -689,6 +689,8 @@ class GCNSubtarget final : public AMDGPUGenSubtargetInfo,
689689
return GFX10_BEncoding;
690690
}
691691

692+
bool hasMTBUFInsts() const { return !hasGFX1250Insts(); }
693+
692694
bool hasExportInsts() const {
693695
return !hasGFX940Insts();
694696
}

‎llvm/test/MC/AMDGPU/gfx1250_asm_unsupported.s‎

Lines changed: 49 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,49 @@
1+
; RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1250 -show-encoding %s 2>&1 | FileCheck --check-prefix=GFX1250-ERR --implicit-check-not=error: --strict-whitespace %s
2+
3+
tbuffer_load_d16_format_x v4, off, s[8:11], s3 format:[BUF_FMT_8_UNORM] offset:8388607
4+
// GFX1250-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
5+
6+
tbuffer_load_d16_format_xy v4, off, s[8:11], s3 format:[BUF_FMT_8_SINT] offset:8388607
7+
// GFX1250-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
8+
9+
tbuffer_load_d16_format_xyz v[4:5], off, s[8:11], s3 format:[BUF_FMT_16_UINT] offset:8388607
10+
// GFX1250-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
11+
12+
tbuffer_load_d16_format_xyzw v[4:5], off, s[8:11], s3 format:[BUF_FMT_8_8_USCALED] offset:8388607
13+
// GFX1250-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
14+
15+
tbuffer_load_format_x v4, off, s[8:11], s3 format:[BUF_FMT_32_SINT] offset:8388607
16+
// GFX1250-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
17+
18+
tbuffer_load_format_xy v[4:5], off, s[8:11], s3 format:[BUF_FMT_16_16_SSCALED] offset:8388607
19+
// GFX1250-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
20+
21+
tbuffer_load_format_xyz v[4:6], off, s[8:11], s3 format:[BUF_FMT_11_11_10_FLOAT] offset:8388607
22+
// GFX1250-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
23+
24+
tbuffer_load_format_xyzw v[4:7], off, s[8:11], s3 format:[BUF_FMT_2_10_10_10_UNORM] offset:8388607
25+
// GFX1250-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
26+
27+
tbuffer_store_d16_format_x v4, off, s[8:11], s3 format:[BUF_FMT_2_10_10_10_SINT] offset:8388607
28+
// GFX1250-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
29+
30+
tbuffer_store_d16_format_xy v4, off, s[8:11], s3 format:[BUF_FMT_8_8_8_8_UINT] offset:8388607
31+
// GFX1250-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
32+
33+
tbuffer_store_d16_format_xyz v[4:5], off, s[8:11], s3 format:[BUF_FMT_16_16_16_16_UNORM] offset:8388607
34+
// GFX1250-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
35+
36+
tbuffer_store_d16_format_xyzw v[4:5], off, s[8:11], s3 format:[BUF_FMT_16_16_16_16_SINT] offset:8388607
37+
// GFX1250-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
38+
39+
tbuffer_store_format_x v4, off, s[8:11], s3 format:[BUF_FMT_32_32_32_32_UINT] offset:8388607
40+
// GFX1250-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
41+
42+
tbuffer_store_format_xy v[4:5], off, s[8:11], s3 format:[BUF_FMT_16_UNORM] offset:8388607
43+
// GFX1250-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
44+
45+
tbuffer_store_format_xyz v[4:6], off, s[8:11], s3 format:[BUF_FMT_32_FLOAT] offset:8388607
46+
// GFX1250-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
47+
48+
tbuffer_store_format_xyzw v[4:7], off, s[8:11], s3 format:[BUF_FMT_2_10_10_10_SNORM] offset:8388607
49+
// GFX1250-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU

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