Skip to content

Commit ce6f04f

Browse files
committed
fixup! [RISCV] Optimized and with atomic_load into zextload when safe.
used maskTrailingOnes
1 parent a1d2098 commit ce6f04f

File tree

1 file changed

+1
-5
lines changed

1 file changed

+1
-5
lines changed

llvm/lib/Target/RISCV/RISCVISelLowering.cpp

Lines changed: 1 addition & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -15299,11 +15299,7 @@ static SDValue reduceANDOfAtomicLoad(SDNode *N,
1529915299
EVT LoadedVT = ALoad->getMemoryVT();
1530015300
EVT ResultVT = N->getValueType(0);
1530115301

15302-
SDValue MaskVal = N->getOperand(1);
15303-
ConstantSDNode *MaskConst = dyn_cast<ConstantSDNode>(MaskVal);
15304-
if (!MaskConst)
15305-
return SDValue();
15306-
uint64_t Mask = MaskConst->getZExtValue();
15302+
uint64_t Mask = maskTrailingOnes<uint64_t>(LoadedVT.getSizeInBits());
1530715303
uint64_t ExpectedMask = LoadedVT.getSizeInBits() == 8 ? 0xFF
1530815304
: LoadedVT.getSizeInBits() == 16 ? 0xFFFF
1530915305
: LoadedVT.getSizeInBits() == 32 ? 0xFFFFFFFF

0 commit comments

Comments
 (0)