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| 1 | +//===- RISCVCopyCombine.cpp - Remove special copy for RISC-V --===// |
| 2 | +// |
| 3 | +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
| 4 | +// See https://llvm.org/LICENSE.txt for license information. |
| 5 | +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
| 6 | +// |
| 7 | +//===---------------------------------------------------------------------===// |
| 8 | +// |
| 9 | +// This pass attempts a shrink-wrap optimization for special cases, which is |
| 10 | +// effective when data types require extension. |
| 11 | +// |
| 12 | +// After finalize-isel: |
| 13 | +// bb0: |
| 14 | +// liveins: $x10, $x11 |
| 15 | +// %1:gpr = COPY $x11 ---- will be delete in this pass |
| 16 | +// %0:gpr = COPY $x10 |
| 17 | +// %2:gpr = COPY %1:gpr ---- without this pass, sink to bb1 in machine-sink, |
| 18 | +// then delete at regalloc |
| 19 | +// BEQ %0:gpr, killed %3:gpr, %bb.3 PseudoBR %bb1 |
| 20 | +// |
| 21 | +// bb1: |
| 22 | +// bb2: |
| 23 | +// BNE %2:gpr, killed %5:gpr, %bb.2 |
| 24 | +// ... |
| 25 | +// After regalloc |
| 26 | +// bb0: |
| 27 | +// liveins: $x10, $x11 |
| 28 | +// renamable $x8 = COPY $x11 |
| 29 | +// renamable $x11 = ADDI $x0, 57 --- def x11, so COPY can not be sink |
| 30 | +// BEQ killed renamable $x10, killed renamable $x11, %bb.4 |
| 31 | +// PseudoBR %bb.1 |
| 32 | +// |
| 33 | +// bb1: |
| 34 | +// bb2: |
| 35 | +// BEQ killed renamable $x8, killed renamable $x10, %bb.4 |
| 36 | +// |
| 37 | +// -----> |
| 38 | +// |
| 39 | +// After this pass: |
| 40 | +// bb0: |
| 41 | +// liveins: $x10, $x11 |
| 42 | +// %0:gpr = COPY $x10 |
| 43 | +// %2:gpr = COPY $x11 |
| 44 | +// BEQ %0:gpr, killed %3:gpr, %bb.3 |
| 45 | +// PseudoBR %bb1 |
| 46 | +// |
| 47 | +// bb1: |
| 48 | +// bb2: |
| 49 | +// BNE %2:gpr, killed %5:gpr, %bb.2 |
| 50 | +// ... |
| 51 | +// After regalloc |
| 52 | +// bb0: |
| 53 | +// liveins: $x10, $x11 |
| 54 | +// renamable $x12 = ADDI $x0, 57 |
| 55 | +// renamable $x8 = COPY $x11 |
| 56 | +// BEQ killed renamable $x10, killed renamable $x11, %bb.4 |
| 57 | +// PseudoBR %bb.1 |
| 58 | +// |
| 59 | +// bb1: |
| 60 | +// bb2: |
| 61 | +// BEQ killed renamable $x8, killed renamable $x10, %bb.4 |
| 62 | +//===---------------------------------------------------------------------===// |
| 63 | + |
| 64 | +#include "RISCV.h" |
| 65 | +#include "RISCVSubtarget.h" |
| 66 | +#include "llvm/ADT/Statistic.h" |
| 67 | +#include "llvm/CodeGen/MachineFunctionPass.h" |
| 68 | + |
| 69 | +using namespace llvm; |
| 70 | +#define DEBUG_TYPE "riscv-copy-combine" |
| 71 | +#define RISCV_COPY_COMBINE "RISC-V Copy Combine" |
| 72 | + |
| 73 | +STATISTIC(NumCopyDeleted, "Number of copy deleted"); |
| 74 | + |
| 75 | +namespace { |
| 76 | +class RISCVCopyCombine : public MachineFunctionPass { |
| 77 | +public: |
| 78 | + static char ID; |
| 79 | + const TargetInstrInfo *TII; |
| 80 | + MachineRegisterInfo *MRI; |
| 81 | + const TargetRegisterInfo *TRI; |
| 82 | + const RISCVSubtarget *ST; |
| 83 | + |
| 84 | + RISCVCopyCombine() : MachineFunctionPass(ID) {} |
| 85 | + bool runOnMachineFunction(MachineFunction &MF) override; |
| 86 | + MachineFunctionProperties getRequiredProperties() const override { |
| 87 | + return MachineFunctionProperties().set( |
| 88 | + MachineFunctionProperties::Property::IsSSA); |
| 89 | + } |
| 90 | + |
| 91 | + StringRef getPassName() const override { return RISCV_COPY_COMBINE; } |
| 92 | + |
| 93 | +private: |
| 94 | + bool optimizeBlock(MachineBasicBlock &MBB); |
| 95 | +}; |
| 96 | +} // end anonymous namespace |
| 97 | + |
| 98 | +char RISCVCopyCombine::ID = 0; |
| 99 | +INITIALIZE_PASS(RISCVCopyCombine, DEBUG_TYPE, RISCV_COPY_COMBINE, false, false) |
| 100 | + |
| 101 | +bool RISCVCopyCombine::optimizeBlock(MachineBasicBlock &MBB) { |
| 102 | + MachineBasicBlock *TBB = nullptr, *FBB = nullptr; |
| 103 | + SmallVector<MachineOperand, 3> Cond; |
| 104 | + if (TII->analyzeBranch(MBB, TBB, FBB, Cond, /*AllowModify*/ false) || |
| 105 | + Cond.empty()) |
| 106 | + return false; |
| 107 | + |
| 108 | + if (!TBB || Cond.size() != 3) |
| 109 | + return false; |
| 110 | + |
| 111 | + MachineInstr *MI = MRI->getVRegDef(Cond[1].getReg()); |
| 112 | + if (MI->getOpcode() == RISCV::COPY) { |
| 113 | + if (MRI->hasOneUse(MI->getOperand(1).getReg()) && |
| 114 | + MI->getOperand(1).getReg().isVirtual() && |
| 115 | + MI->getOperand(0).getReg().isVirtual()) { |
| 116 | + MachineInstr *Src = MRI->getVRegDef(MI->getOperand(1).getReg()); |
| 117 | + if (Src && Src->getOpcode() == RISCV::COPY && |
| 118 | + Src->getParent() == MI->getParent()) { |
| 119 | + MRI->replaceRegWith(MI->getOperand(1).getReg(), |
| 120 | + Src->getOperand(1).getReg()); |
| 121 | + LLVM_DEBUG(dbgs() << "Deleting this copy instruction "; |
| 122 | + Src->print(dbgs())); |
| 123 | + ++NumCopyDeleted; |
| 124 | + Src->eraseFromParent(); |
| 125 | + return true; |
| 126 | + } |
| 127 | + } |
| 128 | + } |
| 129 | + return false; |
| 130 | +} |
| 131 | + |
| 132 | +bool RISCVCopyCombine::runOnMachineFunction(MachineFunction &MF) { |
| 133 | + if (skipFunction(MF.getFunction())) |
| 134 | + return false; |
| 135 | + |
| 136 | + TII = MF.getSubtarget().getInstrInfo(); |
| 137 | + ; |
| 138 | + MRI = &MF.getRegInfo(); |
| 139 | + TRI = MRI->getTargetRegisterInfo(); |
| 140 | + |
| 141 | + bool Changed = false; |
| 142 | + for (MachineBasicBlock &MBB : MF) |
| 143 | + Changed |= optimizeBlock(MBB); |
| 144 | + |
| 145 | + return Changed; |
| 146 | +} |
| 147 | + |
| 148 | +FunctionPass *llvm::createRISCVCopyCombinePass() { |
| 149 | + return new RISCVCopyCombine(); |
| 150 | +} |
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