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Fix clang build
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llvm/lib/Target/AArch64/AArch64ISelLowering.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -105,7 +105,6 @@
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#include <vector>
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using namespace llvm;
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using namespace llvm::SDPatternMatch;
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#define DEBUG_TYPE "aarch64-lower"
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@@ -22594,6 +22593,7 @@ static SDValue performSubWithBorrowCombine(SDNode *N, SelectionDAG &DAG) {
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// ashr+xtn+usra. The first form has less total latency due to more parallelism,
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// but more micro-ops and seems to be slower in practice.
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static SDValue performAddTruncShiftCombine(SDNode *N, SelectionDAG &DAG) {
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using namespace llvm::SDPatternMatch;
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EVT VT = N->getValueType(0);
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if (VT != MVT::v2i32 && VT != MVT::v4i16 && VT != MVT::v8i8)
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return SDValue();
@@ -28150,6 +28150,7 @@ static SDValue performRNDRCombine(SDNode *N, SelectionDAG &DAG) {
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static SDValue performCTPOPCombine(SDNode *N,
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TargetLowering::DAGCombinerInfo &DCI,
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SelectionDAG &DAG) {
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using namespace llvm::SDPatternMatch;
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if (!DCI.isBeforeLegalize())
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return SDValue();
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