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1 parent d18eca0 commit d070960Copy full SHA for d070960
mlir/lib/Dialect/SPIRV/IR/SPIRVOps.cpp
@@ -723,7 +723,9 @@ void mlir::spirv::ConstantOp::getAsmResultNames(
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IntegerType intTy = llvm::dyn_cast<IntegerType>(type);
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if (IntegerAttr intCst = llvm::dyn_cast<IntegerAttr>(getValue())) {
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- if (intTy && intTy.getWidth() == 1) {
+ assert(intTy);
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+
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+ if (intTy.getWidth() == 1) {
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return setNameFn(getResult(), (intCst.getInt() ? "true" : "false"));
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}
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