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[CodeGen][NPM] MachineScheduler: Inline constructors
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llvm/lib/CodeGen/MachineScheduler.cpp

Lines changed: 46 additions & 61 deletions
Original file line numberDiff line numberDiff line change
@@ -228,10 +228,29 @@ class MachineSchedulerImpl : public MachineSchedulerBase {
228228
MachineFunctionAnalysisManager *MFAM = nullptr;
229229

230230
public:
231-
MachineSchedulerImpl(MachineFunction &Func, MachineFunctionPass *P);
231+
MachineSchedulerImpl(MachineFunction &Func, MachineFunctionPass *P) : P(P) {
232+
MF = &Func;
233+
MLI = &P->getAnalysis<MachineLoopInfoWrapperPass>().getLI();
234+
MDT = &P->getAnalysis<MachineDominatorTreeWrapperPass>().getDomTree();
235+
TM = &P->getAnalysis<TargetPassConfig>().getTM<TargetMachine>();
236+
AA = &P->getAnalysis<AAResultsWrapperPass>().getAAResults();
237+
LIS = &P->getAnalysis<LiveIntervalsWrapperPass>().getLIS();
238+
}
239+
232240
MachineSchedulerImpl(MachineFunction &Func,
233241
MachineFunctionAnalysisManager &MFAM,
234-
const TargetMachine *TargetM);
242+
const TargetMachine *TargetM)
243+
: MFAM(&MFAM) {
244+
MF = &Func;
245+
TM = TargetM;
246+
MLI = &MFAM.getResult<MachineLoopAnalysis>(Func);
247+
MDT = &MFAM.getResult<MachineDominatorTreeAnalysis>(Func);
248+
auto &FAM =
249+
MFAM.getResult<FunctionAnalysisManagerMachineFunctionProxy>(Func)
250+
.getManager();
251+
AA = &FAM.getResult<AAManager>(Func.getFunction());
252+
LIS = &MFAM.getResult<LiveIntervalsAnalysis>(Func);
253+
}
235254
bool run();
236255

237256
protected:
@@ -244,10 +263,26 @@ class PostMachineSchedulerImpl : public MachineSchedulerBase {
244263
MachineFunctionAnalysisManager *MFAM = nullptr;
245264

246265
public:
247-
PostMachineSchedulerImpl(MachineFunction &Func, MachineFunctionPass *P);
266+
PostMachineSchedulerImpl(MachineFunction &Func, MachineFunctionPass *P)
267+
: P(P) {
268+
MF = &Func;
269+
MLI = &P->getAnalysis<MachineLoopInfoWrapperPass>().getLI();
270+
TM = &P->getAnalysis<TargetPassConfig>().getTM<TargetMachine>();
271+
AA = &P->getAnalysis<AAResultsWrapperPass>().getAAResults();
272+
}
273+
248274
PostMachineSchedulerImpl(MachineFunction &Func,
249275
MachineFunctionAnalysisManager &MFAM,
250-
const TargetMachine *TargetM);
276+
const TargetMachine *TargetM)
277+
: MFAM(&MFAM) {
278+
MF = &Func;
279+
TM = TargetM;
280+
MLI = &MFAM.getResult<MachineLoopAnalysis>(Func);
281+
auto &FAM =
282+
MFAM.getResult<FunctionAnalysisManagerMachineFunctionProxy>(Func)
283+
.getManager();
284+
AA = &FAM.getResult<AAManager>(Func.getFunction());
285+
}
251286
bool run();
252287

253288
protected:
@@ -257,7 +292,9 @@ class PostMachineSchedulerImpl : public MachineSchedulerBase {
257292
/// MachineScheduler runs after coalescing and before register allocation.
258293
class MachineSchedulerLegacy : public MachineFunctionPass {
259294
public:
260-
MachineSchedulerLegacy();
295+
MachineSchedulerLegacy() : MachineFunctionPass(ID) {
296+
initializeMachineSchedulerLegacyPass(*PassRegistry::getPassRegistry());
297+
}
261298
void getAnalysisUsage(AnalysisUsage &AU) const override;
262299
bool runOnMachineFunction(MachineFunction&) override;
263300

@@ -267,7 +304,10 @@ class MachineSchedulerLegacy : public MachineFunctionPass {
267304
/// PostMachineScheduler runs after shortly before code emission.
268305
class PostMachineSchedulerLegacy : public MachineFunctionPass {
269306
public:
270-
PostMachineSchedulerLegacy();
307+
PostMachineSchedulerLegacy() : MachineFunctionPass(ID) {
308+
initializePostMachineSchedulerLegacyPass(*PassRegistry::getPassRegistry());
309+
}
310+
271311
void getAnalysisUsage(AnalysisUsage &AU) const override;
272312
bool runOnMachineFunction(MachineFunction&) override;
273313

@@ -290,10 +330,6 @@ INITIALIZE_PASS_DEPENDENCY(LiveIntervalsWrapperPass)
290330
INITIALIZE_PASS_END(MachineSchedulerLegacy, DEBUG_TYPE,
291331
"Machine Instruction Scheduler", false, false)
292332

293-
MachineSchedulerLegacy::MachineSchedulerLegacy() : MachineFunctionPass(ID) {
294-
initializeMachineSchedulerLegacyPass(*PassRegistry::getPassRegistry());
295-
}
296-
297333
void MachineSchedulerLegacy::getAnalysisUsage(AnalysisUsage &AU) const {
298334
AU.setPreservesCFG();
299335
AU.addRequired<MachineDominatorTreeWrapperPass>();
@@ -319,11 +355,6 @@ INITIALIZE_PASS_DEPENDENCY(AAResultsWrapperPass)
319355
INITIALIZE_PASS_END(PostMachineSchedulerLegacy, "postmisched",
320356
"PostRA Machine Instruction Scheduler", false, false)
321357

322-
PostMachineSchedulerLegacy::PostMachineSchedulerLegacy()
323-
: MachineFunctionPass(ID) {
324-
initializePostMachineSchedulerLegacyPass(*PassRegistry::getPassRegistry());
325-
}
326-
327358
void PostMachineSchedulerLegacy::getAnalysisUsage(AnalysisUsage &AU) const {
328359
AU.setPreservesCFG();
329360
AU.addRequired<MachineDominatorTreeWrapperPass>();
@@ -403,31 +434,6 @@ nextIfDebug(MachineBasicBlock::iterator I,
403434
.getNonConstIterator();
404435
}
405436

406-
MachineSchedulerImpl::MachineSchedulerImpl(MachineFunction &Func,
407-
MachineFunctionPass *P)
408-
: P(P) {
409-
MF = &Func;
410-
MLI = &P->getAnalysis<MachineLoopInfoWrapperPass>().getLI();
411-
MDT = &P->getAnalysis<MachineDominatorTreeWrapperPass>().getDomTree();
412-
TM = &P->getAnalysis<TargetPassConfig>().getTM<TargetMachine>();
413-
AA = &P->getAnalysis<AAResultsWrapperPass>().getAAResults();
414-
LIS = &P->getAnalysis<LiveIntervalsWrapperPass>().getLIS();
415-
}
416-
417-
MachineSchedulerImpl::MachineSchedulerImpl(MachineFunction &Func,
418-
MachineFunctionAnalysisManager &MFAM,
419-
const TargetMachine *TargetM)
420-
: MFAM(&MFAM) {
421-
MF = &Func;
422-
TM = TargetM;
423-
MLI = &MFAM.getResult<MachineLoopAnalysis>(Func);
424-
MDT = &MFAM.getResult<MachineDominatorTreeAnalysis>(Func);
425-
auto &FAM = MFAM.getResult<FunctionAnalysisManagerMachineFunctionProxy>(Func)
426-
.getManager();
427-
AA = &FAM.getResult<AAManager>(Func.getFunction());
428-
LIS = &MFAM.getResult<LiveIntervalsAnalysis>(Func);
429-
}
430-
431437
/// Instantiate a ScheduleDAGInstrs that will be owned by the caller.
432438
ScheduleDAGInstrs *MachineSchedulerImpl::createMachineScheduler() {
433439
// Select the scheduler, or set the default.
@@ -471,27 +477,6 @@ bool MachineSchedulerImpl::run() {
471477
return true;
472478
}
473479

474-
PostMachineSchedulerImpl::PostMachineSchedulerImpl(MachineFunction &Func,
475-
MachineFunctionPass *P)
476-
: P(P) {
477-
MF = &Func;
478-
MLI = &P->getAnalysis<MachineLoopInfoWrapperPass>().getLI();
479-
TM = &P->getAnalysis<TargetPassConfig>().getTM<TargetMachine>();
480-
AA = &P->getAnalysis<AAResultsWrapperPass>().getAAResults();
481-
}
482-
483-
PostMachineSchedulerImpl::PostMachineSchedulerImpl(
484-
MachineFunction &Func, MachineFunctionAnalysisManager &MFAM,
485-
const TargetMachine *TargetM)
486-
: MFAM(&MFAM) {
487-
MF = &Func;
488-
TM = TargetM;
489-
MLI = &MFAM.getResult<MachineLoopAnalysis>(Func);
490-
auto &FAM = MFAM.getResult<FunctionAnalysisManagerMachineFunctionProxy>(Func)
491-
.getManager();
492-
AA = &FAM.getResult<AAManager>(Func.getFunction());
493-
}
494-
495480
/// Instantiate a ScheduleDAGInstrs for PostRA scheduling that will be owned by
496481
/// the caller. We don't have a command line option to override the postRA
497482
/// scheduler. The Target must configure it.

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