@@ -3248,15 +3248,14 @@ InstructionCost AArch64TTIImpl::getVectorInstrCostHelper(
32483248 // Check if the extractelement user is scalar fmul.
32493249 auto IsUserFMulScalarTy = [](const Value *EEUser) {
32503250 // Check if the user is scalar fmul.
3251- const auto *BO = dyn_cast_if_present <BinaryOperator>(EEUser);
3251+ const auto *BO = dyn_cast <BinaryOperator>(EEUser);
32523252 return BO && BO->getOpcode () == BinaryOperator::FMul &&
32533253 !BO->getType ()->isVectorTy ();
32543254 };
32553255
32563256 // Check if the extract index is from lane 0 or lane equivalent to 0 for a
32573257 // certain scalar type and a certain vector register width.
3258- auto IsExtractLaneEquivalentToZero = [&](const unsigned &Idx,
3259- const unsigned &EltSz) {
3258+ auto IsExtractLaneEquivalentToZero = [&](unsigned Idx, unsigned EltSz) {
32603259 auto RegWidth =
32613260 getRegisterBitWidth (TargetTransformInfo::RGK_FixedWidthVector)
32623261 .getFixedValue ();
@@ -3277,13 +3276,15 @@ InstructionCost AArch64TTIImpl::getVectorInstrCostHelper(
32773276 // important.
32783277 UserToExtractIdx[U];
32793278 }
3279+ if (UserToExtractIdx.empty ())
3280+ return false ;
32803281 for (auto &[S, U, L] : ScalarUserAndIdx) {
32813282 for (auto *U : S->users ()) {
32823283 if (UserToExtractIdx.find (U) != UserToExtractIdx.end ()) {
32833284 auto *FMul = cast<BinaryOperator>(U);
32843285 auto *Op0 = FMul->getOperand (0 );
32853286 auto *Op1 = FMul->getOperand (1 );
3286- if ((Op0 == S && Op1 == S) || ( Op0 != S) || ( Op1 != S) ) {
3287+ if ((Op0 == S && Op1 == S) || Op0 != S || Op1 != S) {
32873288 UserToExtractIdx[U] = L;
32883289 break ;
32893290 }
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