Skip to content

Commit d145dc1

Browse files
authored
[RISCV] Reduce code duplication in RISCVMoveMerge::findMatchingInst. NFCI (#154451)
1 parent 2db239a commit d145dc1

File tree

1 file changed

+10
-15
lines changed

1 file changed

+10
-15
lines changed

llvm/lib/Target/RISCV/RISCVMoveMerger.cpp

Lines changed: 10 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -176,25 +176,20 @@ RISCVMoveMerge::findMatchingInst(MachineBasicBlock::iterator &MBBI,
176176
Register SourceReg = SecondPair->Source->getReg();
177177
Register DestReg = SecondPair->Destination->getReg();
178178

179-
if (MoveFromSToA && isCandidateToMergeMVA01S(*SecondPair)) {
180-
// If register pair is valid and destination registers are different.
181-
if ((RegPair.Destination->getReg() == DestReg))
179+
bool IsCandidate = MoveFromSToA ? isCandidateToMergeMVA01S(*SecondPair)
180+
: isCandidateToMergeMVSA01(*SecondPair);
181+
if (IsCandidate) {
182+
// Second destination must be different.
183+
if (RegPair.Destination->getReg() == DestReg)
182184
return E;
183185

184-
// If paired destination register was modified or used, the source reg
185-
// was modified, there is no possibility of finding matching
186-
// instruction so exit early.
187-
if (!ModifiedRegUnits.available(DestReg) ||
188-
!UsedRegUnits.available(DestReg) ||
189-
!ModifiedRegUnits.available(SourceReg))
190-
return E;
191-
192-
return I;
193-
} else if (!MoveFromSToA && isCandidateToMergeMVSA01(*SecondPair)) {
194-
if ((RegPair.Source->getReg() == SourceReg) ||
195-
(RegPair.Destination->getReg() == DestReg))
186+
// For AtoS the source must also be different.
187+
if (!MoveFromSToA && RegPair.Source->getReg() == SourceReg)
196188
return E;
197189

190+
// If paired destination register was modified or used, the source reg
191+
// was modified, there is no possibility of finding matching
192+
// instruction so exit early.
198193
if (!ModifiedRegUnits.available(DestReg) ||
199194
!UsedRegUnits.available(DestReg) ||
200195
!ModifiedRegUnits.available(SourceReg))

0 commit comments

Comments
 (0)