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1 parent e2888d7 commit d1be8f7Copy full SHA for d1be8f7
llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp
@@ -131,7 +131,7 @@ namespace {
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class RISCVMCInstrAnalysis : public MCInstrAnalysis {
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int64_t GPRState[31] = {};
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std::bitset<31> GPRValidMask;
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- int ArchRegWidth;
+ unsigned int ArchRegWidth;
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static bool isGPR(MCRegister Reg) {
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return Reg >= RISCV::X0 && Reg <= RISCV::X31;
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