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[InstCombine] Transform vector.reduce.add and splat into multiplication (#161020)
Fixes #160066 Whenever we have a vector with all the same elemnts, created with `insertelement` and `shufflevector` and we sum the vector, we have a multiplication.
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‎llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp‎

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@@ -64,6 +64,7 @@
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#include "llvm/Support/KnownBits.h"
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#include "llvm/Support/KnownFPClass.h"
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#include "llvm/Support/MathExtras.h"
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#include "llvm/Support/TypeSize.h"
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#include "llvm/Support/raw_ostream.h"
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#include "llvm/Transforms/InstCombine/InstCombiner.h"
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#include "llvm/Transforms/Utils/AssumeBundleBuilder.h"
@@ -3781,6 +3782,17 @@ Instruction *InstCombinerImpl::visitCallInst(CallInst &CI) {
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return replaceInstUsesWith(CI, Res);
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}
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}
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// vector.reduce.add.vNiM(splat(%x)) -> mul(%x, N)
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if (Value *Splat = getSplatValue(Arg)) {
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ElementCount VecToReduceCount =
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cast<VectorType>(Arg->getType())->getElementCount();
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if (VecToReduceCount.isFixed()) {
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unsigned VectorSize = VecToReduceCount.getFixedValue();
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return BinaryOperator::CreateMul(
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Splat, ConstantInt::get(Splat->getType(), VectorSize));
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}
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}
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}
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[[fallthrough]];
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}

‎llvm/test/Transforms/InstCombine/vector-reductions.ll‎

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@@ -308,3 +308,174 @@ define i32 @diff_of_sums_type_mismatch2(<8 x i32> %v0, <4 x i32> %v1) {
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%r = sub i32 %r0, %r1
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ret i32 %r
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}
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define i32 @constant_multiplied_4xi32(i32 %0) {
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; CHECK-LABEL: @constant_multiplied_4xi32(
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; CHECK-NEXT: [[TMP2:%.*]] = shl i32 [[TMP0:%.*]], 2
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; CHECK-NEXT: ret i32 [[TMP2]]
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;
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%2 = insertelement <4 x i32> poison, i32 %0, i64 0
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%3 = shufflevector <4 x i32> %2, <4 x i32> poison, <4 x i32> zeroinitializer
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%4 = tail call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> %3)
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ret i32 %4
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}
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define i32 @constant_multiplied_3xi32(i32 %0) {
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; CHECK-LABEL: @constant_multiplied_3xi32(
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; CHECK-NEXT: [[TMP2:%.*]] = mul i32 [[TMP0:%.*]], 3
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; CHECK-NEXT: ret i32 [[TMP2]]
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;
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%2 = insertelement <3 x i32> poison, i32 %0, i64 0
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%3 = shufflevector <3 x i32> %2, <3 x i32> poison, <3 x i32> zeroinitializer
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%4 = tail call i32 @llvm.vector.reduce.add.v3i32(<3 x i32> %3)
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ret i32 %4
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}
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define i64 @constant_multiplied_4xi64(i64 %0) {
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; CHECK-LABEL: @constant_multiplied_4xi64(
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; CHECK-NEXT: [[TMP2:%.*]] = shl i64 [[TMP0:%.*]], 2
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; CHECK-NEXT: ret i64 [[TMP2]]
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;
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%2 = insertelement <4 x i64> poison, i64 %0, i64 0
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%3 = shufflevector <4 x i64> %2, <4 x i64> poison, <4 x i32> zeroinitializer
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%4 = tail call i64 @llvm.vector.reduce.add.v4i64(<4 x i64> %3)
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ret i64 %4
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}
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define i32 @constant_multiplied_8xi32(i32 %0) {
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; CHECK-LABEL: @constant_multiplied_8xi32(
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; CHECK-NEXT: [[TMP2:%.*]] = shl i32 [[TMP0:%.*]], 3
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; CHECK-NEXT: ret i32 [[TMP2]]
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;
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%2 = insertelement <4 x i32> poison, i32 %0, i64 0
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%3 = shufflevector <4 x i32> %2, <4 x i32> poison, <8 x i32> zeroinitializer
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%4 = tail call i32 @llvm.vector.reduce.add.v8i32(<8 x i32> %3)
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ret i32 %4
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}
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define i32 @constant_multiplied_16xi32(i32 %0) {
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; CHECK-LABEL: @constant_multiplied_16xi32(
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; CHECK-NEXT: [[TMP2:%.*]] = shl i32 [[TMP0:%.*]], 4
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; CHECK-NEXT: ret i32 [[TMP2]]
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;
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%2 = insertelement <4 x i32> poison, i32 %0, i64 0
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%3 = shufflevector <4 x i32> %2, <4 x i32> poison, <16 x i32> zeroinitializer
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%4 = tail call i32 @llvm.vector.reduce.add.v16i32(<16 x i32> %3)
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ret i32 %4
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}
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define i32 @constant_multiplied_4xi32_at_idx1(i32 %0) {
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; CHECK-LABEL: @constant_multiplied_4xi32_at_idx1(
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; CHECK-NEXT: [[TMP2:%.*]] = shl i32 [[TMP0:%.*]], 2
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; CHECK-NEXT: ret i32 [[TMP2]]
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;
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%2 = insertelement <4 x i32> poison, i32 %0, i64 1
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%3 = shufflevector <4 x i32> %2, <4 x i32> poison,
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<4 x i32> <i32 1, i32 1, i32 1, i32 1>
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%4 = tail call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> %3)
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ret i32 %4
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}
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define i32 @negative_constant_multiplied_4xi32(i32 %0) {
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; CHECK-LABEL: @negative_constant_multiplied_4xi32(
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; CHECK-NEXT: ret i32 poison
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;
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%2 = insertelement <4 x i32> poison, i32 %0, i64 1
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%3 = shufflevector <4 x i32> %2, <4 x i32> poison, <4 x i32> zeroinitializer
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%4 = tail call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> %3)
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ret i32 %4
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}
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define i32 @constant_multiplied_6xi32(i32 %0) {
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; CHECK-LABEL: @constant_multiplied_6xi32(
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; CHECK-NEXT: [[TMP2:%.*]] = mul i32 [[TMP0:%.*]], 6
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; CHECK-NEXT: ret i32 [[TMP2]]
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;
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%2 = insertelement <4 x i32> poison, i32 %0, i64 0
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%3 = shufflevector <4 x i32> %2, <4 x i32> poison, <6 x i32> zeroinitializer
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%4 = tail call i32 @llvm.vector.reduce.add.v6i32(<6 x i32> %3)
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ret i32 %4
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}
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define i64 @constant_multiplied_6xi64(i64 %0) {
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; CHECK-LABEL: @constant_multiplied_6xi64(
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; CHECK-NEXT: [[TMP2:%.*]] = mul i64 [[TMP0:%.*]], 6
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; CHECK-NEXT: ret i64 [[TMP2]]
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;
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%2 = insertelement <4 x i64> poison, i64 %0, i64 0
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%3 = shufflevector <4 x i64> %2, <4 x i64> poison, <6 x i32> zeroinitializer
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%4 = tail call i64 @llvm.vector.reduce.add.v6i64(<6 x i64> %3)
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ret i64 %4
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}
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define i1 @constant_multiplied_8xi1(i1 %0) {
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; CHECK-LABEL: @constant_multiplied_8xi1(
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; CHECK-NEXT: [[TMP2:%.*]] = insertelement <8 x i1> poison, i1 [[TMP0:%.*]], i64 0
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; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <8 x i1> [[TMP2]], <8 x i1> poison, <8 x i32> zeroinitializer
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; CHECK-NEXT: [[TMP4:%.*]] = bitcast <8 x i1> [[TMP3]] to i8
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; CHECK-NEXT: [[TMP5:%.*]] = call range(i8 0, 9) i8 @llvm.ctpop.i8(i8 [[TMP4]])
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; CHECK-NEXT: [[TMP6:%.*]] = trunc i8 [[TMP5]] to i1
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; CHECK-NEXT: ret i1 [[TMP6]]
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;
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%2 = insertelement <8 x i1> poison, i1 %0, i32 0
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%3 = shufflevector <8 x i1> %2, <8 x i1> poison, <8 x i32> zeroinitializer
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%4 = tail call i1 @llvm.vector.reduce.add.v8i1(<8 x i1> %3)
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ret i1 %4
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}
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define i2 @constant_multiplied_4xi2(i2 %0) {
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; CHECK-LABEL: @constant_multiplied_4xi2(
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; CHECK-NEXT: ret i2 0
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;
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%2 = insertelement <4 x i2> poison, i2 %0, i32 0
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%3 = shufflevector <4 x i2> %2, <4 x i2> poison, <4 x i32> zeroinitializer
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%4 = tail call i2 @llvm.vector.reduce.add.v4i2(<4 x i2> %3)
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ret i2 %4
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}
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define i2 @constant_multiplied_5xi2(i2 %0) {
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; CHECK-LABEL: @constant_multiplied_5xi2(
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; CHECK-NEXT: ret i2 [[TMP0:%.*]]
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;
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%2 = insertelement <5 x i2> poison, i2 %0, i64 0
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%3 = shufflevector <5 x i2> %2, <5 x i2> poison, <5 x i32> zeroinitializer
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%4 = tail call i2 @llvm.vector.reduce.add.v5i2(<5 x i2> %3)
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ret i2 %4
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}
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define i2 @constant_multiplied_6xi2(i2 %0) {
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; CHECK-LABEL: @constant_multiplied_6xi2(
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; CHECK-NEXT: [[TMP2:%.*]] = shl i2 [[TMP0:%.*]], 1
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; CHECK-NEXT: ret i2 [[TMP2]]
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;
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%2 = insertelement <6 x i2> poison, i2 %0, i64 0
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%3 = shufflevector <6 x i2> %2, <6 x i2> poison, <6 x i32> zeroinitializer
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%4 = tail call i2 @llvm.vector.reduce.add.v6i2(<6 x i2> %3)
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ret i2 %4
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}
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define i2 @constant_multiplied_7xi2(i2 %0) {
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; CHECK-LABEL: @constant_multiplied_7xi2(
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; CHECK-NEXT: [[TMP2:%.*]] = sub i2 0, [[TMP0:%.*]]
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; CHECK-NEXT: ret i2 [[TMP2]]
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;
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%2 = insertelement <7 x i2> poison, i2 %0, i64 0
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%3 = shufflevector <7 x i2> %2, <7 x i2> poison, <7 x i32> zeroinitializer
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%4 = tail call i2 @llvm.vector.reduce.add.v7i2(<7 x i2> %3)
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ret i2 %4
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}
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define i32 @negative_scalable_vector(i32 %0) {
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; CHECK-LABEL: @negative_scalable_vector(
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; CHECK-NEXT: [[TMP2:%.*]] = insertelement <vscale x 4 x i32> poison, i32 [[TMP0:%.*]], i64 0
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; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <vscale x 4 x i32> [[TMP2]], <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer
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; CHECK-NEXT: [[TMP4:%.*]] = tail call i32 @llvm.vector.reduce.add.nxv4i32(<vscale x 4 x i32> [[TMP3]])
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; CHECK-NEXT: ret i32 [[TMP4]]
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;
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%2 = insertelement <vscale x 4 x i32> poison, i32 %0, i64 0
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%3 = shufflevector <vscale x 4 x i32> %2, <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer
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%4 = tail call i32 @llvm.vector.reduce.add.nxv4i32(<vscale x 4 x i32> %3)
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ret i32 %4
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}

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