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[RISCV] Correct the predicates for the flh/fsh InstAlias and assembler pseudos to include Zfbfmin. (#131920)
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‎llvm/lib/Target/RISCV/RISCVInstrInfoZfh.td

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -218,7 +218,7 @@ foreach Ext = ZfhminDExts in {
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// Assembler Pseudo Instructions (User-Level ISA, Version 2.2, Chapter 20)
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//===----------------------------------------------------------------------===//
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let Predicates = [HasStdExtZfhmin] in {
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let Predicates = [HasHalfFPLoadStoreMove] in {
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def : InstAlias<"flh $rd, (${rs1})", (FLH FPR16:$rd, GPR:$rs1, 0), 0>;
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def : InstAlias<"fsh $rs2, (${rs1})", (FSH FPR16:$rs2, GPR:$rs1, 0), 0>;
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} // Predicates = [HasStdExtZfhmin]
@@ -241,7 +241,7 @@ def PseudoQuietFLT_H : PseudoQuietFCMP<FPR16>;
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}
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} // Predicates = [HasStdExtZfh]
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let Predicates = [HasStdExtZfhmin] in {
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let Predicates = [HasHalfFPLoadStoreMove] in {
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def PseudoFLH : PseudoFloatLoad<"flh", FPR16>;
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def PseudoFSH : PseudoStore<"fsh", FPR16>;
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} // Predicates = [HasStdExtZfhmin]

‎llvm/test/MC/RISCV/rv32i-invalid.s

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -190,7 +190,7 @@ fadd.h ft0, ft1, ft2 # CHECK: :[[@LINE]]:1: error: instruction requires the foll
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fadd.s a0, a1, a2 # CHECK: :[[@LINE]]:1: error: instruction requires the following: 'Zfinx' (Float in Integer){{$}}
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fadd.d a0, a2, a4 # CHECK: :[[@LINE]]:1: error: instruction requires the following: 'Zdinx' (Double in Integer){{$}}
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fadd.h a0, a1, a2 # CHECK: :[[@LINE]]:1: error: instruction requires the following: 'Zhinx' (Half Float in Integer){{$}}
193-
flh ft0, (a0) # CHECK: :[[@LINE]]:1: error: instruction requires the following: 'Zfh' (Half-Precision Floating-Point) or 'Zfhmin' (Half-Precision Floating-Point Minimal){{$}}
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flh ft0, (a0) # CHECK: :[[@LINE]]:1: error: instruction requires the following: 'Zfh' (Half-Precision Floating-Point) or 'Zfhmin' (Half-Precision Floating-Point Minimal) or 'Zfbfmin' (Scalar BF16 Converts){{$}}
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sh1add a0, a1, a2 # CHECK: :[[@LINE]]:1: error: instruction requires the following: 'Zba' (Address Generation Instructions) or 'Base P' (Packed-SIMD){{$}}
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clz a0, a1 # CHECK: :[[@LINE]]:1: error: instruction requires the following: 'Zbb' (Basic Bit-Manipulation) or 'Base P' (Packed-SIMD){{$}}
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clmul a0, a1, a2 # CHECK: :[[@LINE]]:1: error: instruction requires the following: 'Zbc' (Carry-Less Multiplication) or 'Zbkc' (Carry-less multiply instructions for Cryptography){{$}}

‎llvm/test/MC/RISCV/rvzfbfmin-aliases-valid.s

Lines changed: 31 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,31 @@
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# RUN: llvm-mc %s -triple=riscv32 -mattr=+zfbfmin -M no-aliases \
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# RUN: | FileCheck -check-prefix=CHECK-INST %s
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# RUN: llvm-mc %s -triple=riscv32 -mattr=+zfbfmin \
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# RUN: | FileCheck -check-prefix=CHECK-ALIAS %s
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# RUN: llvm-mc %s -triple=riscv64 -mattr=+zfbfmin -M no-aliases \
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# RUN: | FileCheck -check-prefix=CHECK-INST %s
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# RUN: llvm-mc %s -triple=riscv64 -mattr=+zfbfmin \
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# RUN: | FileCheck -check-prefix=CHECK-ALIAS %s
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# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+zfbfmin < %s \
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# RUN: | llvm-objdump -d --mattr=+zfbfmin --no-print-imm-hex -M no-aliases - \
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# RUN: | FileCheck -check-prefix=CHECK-INST %s
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# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+zfbfmin < %s \
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# RUN: | llvm-objdump -d --mattr=+zfbfmin --no-print-imm-hex - \
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# RUN: | FileCheck -check-prefix=CHECK-ALIAS %s
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# RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=+zfbfmin < %s \
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# RUN: | llvm-objdump -d --mattr=+zfbfmin --no-print-imm-hex -M no-aliases - \
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# RUN: | FileCheck -check-prefix=CHECK-INST %s
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# RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=+zfbfmin < %s \
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# RUN: | llvm-objdump -d --mattr=+zfbfmin --no-print-imm-hex - \
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# RUN: | FileCheck -check-prefix=CHECK-ALIAS %s
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##===----------------------------------------------------------------------===##
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## Assembler Pseudo Instructions (User-Level ISA, Version 2.2, Chapter 20)
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##===----------------------------------------------------------------------===##
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# CHECK-INST: flh ft0, 0(a0)
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# CHECK-ALIAS: flh ft0, 0(a0)
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flh f0, (x10)
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# CHECK-INST: fsh ft0, 0(a0)
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# CHECK-ALIAS: fsh ft0, 0(a0)
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fsh f0, (x10)

‎llvm/test/MC/RISCV/rvzfh-pseudos.s

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,7 @@
1-
# RUN: llvm-mc %s -triple=riscv32 -mattr=+zfh | FileCheck %s
2-
# RUN: llvm-mc %s -triple=riscv64 -mattr=+zfh | FileCheck %s
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# RUN: llvm-mc %s -triple=riscv32 -mattr=+zfhmin | FileCheck %s
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# RUN: llvm-mc %s -triple=riscv64 -mattr=+zfhmin | FileCheck %s
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# RUN: llvm-mc %s -triple=riscv32 -mattr=+zfbfmin | FileCheck %s
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# RUN: llvm-mc %s -triple=riscv64 -mattr=+zfbfmin | FileCheck %s
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# CHECK: .Lpcrel_hi0:
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# CHECK: auipc a2, %pcrel_hi(a_symbol)

‎llvm/test/MC/RISCV/rvzfhmin-aliases-valid.s

Lines changed: 31 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,31 @@
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# RUN: llvm-mc %s -triple=riscv32 -mattr=+zfhmin -M no-aliases \
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# RUN: | FileCheck -check-prefix=CHECK-INST %s
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# RUN: llvm-mc %s -triple=riscv32 -mattr=+zfhmin \
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# RUN: | FileCheck -check-prefix=CHECK-ALIAS %s
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# RUN: llvm-mc %s -triple=riscv64 -mattr=+zfhmin -M no-aliases \
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# RUN: | FileCheck -check-prefix=CHECK-INST %s
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# RUN: llvm-mc %s -triple=riscv64 -mattr=+zfhmin \
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# RUN: | FileCheck -check-prefix=CHECK-ALIAS %s
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# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+zfhmin < %s \
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# RUN: | llvm-objdump -d --mattr=+zfhmin --no-print-imm-hex -M no-aliases - \
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# RUN: | FileCheck -check-prefix=CHECK-INST %s
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# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+zfhmin < %s \
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# RUN: | llvm-objdump -d --mattr=+zfhmin --no-print-imm-hex - \
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# RUN: | FileCheck -check-prefix=CHECK-ALIAS %s
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# RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=+zfhmin < %s \
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# RUN: | llvm-objdump -d --mattr=+zfhmin --no-print-imm-hex -M no-aliases - \
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# RUN: | FileCheck -check-prefix=CHECK-INST %s
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# RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=+zfhmin < %s \
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# RUN: | llvm-objdump -d --mattr=+zfhmin --no-print-imm-hex - \
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# RUN: | FileCheck -check-prefix=CHECK-ALIAS %s
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##===----------------------------------------------------------------------===##
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## Assembler Pseudo Instructions (User-Level ISA, Version 2.2, Chapter 20)
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##===----------------------------------------------------------------------===##
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# CHECK-INST: flh ft0, 0(a0)
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# CHECK-ALIAS: flh ft0, 0(a0)
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flh f0, (x10)
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# CHECK-INST: fsh ft0, 0(a0)
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# CHECK-ALIAS: fsh ft0, 0(a0)
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fsh f0, (x10)

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